| NTHU-Route 2.0: A fast and stable global router YJ Chang, YT Lee, TC Wang 2008 IEEE/ACM International Conference on Computer-Aided Design, 338-343, 2008 | 137 | 2008 |
| An optimal algorithm for floorplan area optimization TC Wang, DF Wong Proceedings of the 27th ACM/IEEE design automation conference, 180-186, 1991 | 127 | 1991 |
| Recent research and emerging challenges in physical design for manufacturability/reliability CW Lin, MC Tsai, KY Lee, TC Chen, TC Wang, YW Chang 2007 Asia and South Pacific Design Automation Conference, 238-243, 2007 | 118 | 2007 |
| Post-routing redundant via insertion for yield/reliability improvement KY Lee, TC Wang Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 107 | 2006 |
| Through-silicon via planning in 3-D floorplanning MC Tsai, TC Wang, TT Hwang IEEE transactions on very large scale integration (vlsi) systems 19 (8 …, 2010 | 96 | 2010 |
| Congestion-constrained layer assignment for via minimization in global routing TH Lee, TC Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 95 | 2008 |
| NTHU-Route 2.0: a robust global router for modern designs YJ Chang, YT Lee, JR Gao, PC Wu, TC Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 74 | 2010 |
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| A new global router for modern designs JR Gao, PC Wu, TC Wang 2008 Asia and South Pacific Design Automation Conference, 232-237, 2008 | 67 | 2008 |
| Power minization in LUT-based FPGA technology mapping ZH Wang, EC Liu, J Lai, TC Wang Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 56 | 2001 |
| Fast fixed-outline 3-D IC floorplanning with TSV co-placement CR Li, WK Mak, TC Wang IEEE transactions on very large scale integration (VLSI) systems 21 (3), 523-532, 2012 | 54 | 2012 |
| Post-routing redundant via insertion and line end extension with via density consideration KY Lee, TC Wang, KY Chao Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 49 | 2006 |
| Fast and optimal redundant via insertion KY Lee, CK Koh, TC Wang, KY Chao IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 47 | 2008 |
| A fast and stable algorithm for obstacle-avoiding rectilinear Steiner minimal tree construction PC Wu, JR Gao, TC Wang 2007 Asia and South Pacific Design Automation Conference, 262-267, 2007 | 46 | 2007 |
| Module placement with boundary constraints using the sequence-pair representation J Lai, MS Lin, TC Wang, LC Wang Proceedings of the 2001 Asia and South Pacific design automation conference …, 2001 | 45 | 2001 |
| Routing for symmetric FPGAs and FPICs Y Sun, TC Wang, CK Wong, CL Liu IEEE transactions on computer-aided design of integrated circuits and …, 1997 | 45 | 1997 |
| Maze routing with OPC consideration YR Wu, MC Tsai, TC Wang Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 41 | 2005 |
| Timing-aware layer assignment for advanced process technologies considering via pillars G Liu, X Zhang, W Guo, X Huang, WH Liu, KY Chao, TC Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 37 | 2021 |
| Density-aware detailed placement with instant legalization S Popovych, HH Lai, CM Wang, YL Li, WH Liu, TC Wang Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 34 | 2014 |
| Optimal post-routing redundant via insertion KY Lee, CK Koh, TC Wang, KY Chao Proceedings of the 2008 international symposium on Physical design, 111-117, 2008 | 34 | 2008 |
