Ashish Ranjan
Ashish Ranjan
Research Staff Member, IBM T.J. Watson Research Center
Verified email at ibm.com - Homepage
Title
Cited by
Cited by
Year
AxNN: energy-efficient neuromorphic systems using approximate computing
S Venkataramani, A Ranjan, K Roy, A Raghunathan
2014 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2014
1742014
ASLAN: Synthesis of approximate sequential circuits
A Ranjan, A Raha, S Venkataramani, K Roy, A Raghunathan
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
1102014
Scaledeep: A scalable compute architecture for learning and evaluating deep networks
S Venkataramani, A Ranjan, S Banerjee, D Das, S Avancha, ...
Proceedings of the 44th Annual International Symposium on Computer …, 2017
992017
Computing in memory with spin-transfer torque magnetic ram
S Jain, A Ranjan, K Roy, A Raghunathan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (3), 470-483, 2017
872017
Approximate storage for energy efficient spintronic memories
A Ranjan, S Venkataramani, X Fong, K Roy, A Raghunathan
Proceedings of the 52nd Annual Design Automation Conference, 195, 2015
652015
STAxCache: An approximate, energy efficient STT-MRAM cache
A Ranjan, S Venkataramani, Z Pajouhi, R Venkatesan, K Roy, ...
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
192017
Approximate memory compression for energy-efficiency
A Ranjan, A Raha, V Raghunathan, A Raghunathan
2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017
162017
Dyrectape: a dynamically reconfigurable cache using domain wall memory tapes
A Ranjan, SG Ramasubramanian, R Venkatesan, V Pai, K Roy, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 181-186, 2015
112015
System and method for in-memory computing
S Jain, A Ranjan, K Roy, A Raghunathan
US Patent App. 10/073,733, 2018
8*2018
X-MANN: A crossbar based architecture for memory augmented neural networks
A Ranjan, S Jain, JR Stevens, D Das, B Kaul, A Raghunathan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
72019
AxBA: an approximate bus architecture framework
JR Stevens, A Ranjan, A Raghunathan
Proceedings of the International Conference on Computer-Aided Design, 1-8, 2018
62018
System and method for in-memory computing
S Jain, A Ranjan, K Roy, A Raghunathan
US Patent 10,073,733, 2018
32018
Manna: An Accelerator for Memory-Augmented Neural Networks
JR Stevens, A Ranjan, D Das, B Kaul, A Raghunathan
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
22019
Cache Memory Design With Magnetic Skyrmions in a Long Nanotrack
MC Chen, A Ranjan, A Raghunathan, K Roy
IEEE Transactions on Magnetics 55 (8), 1-9, 2019
12019
Emerging neural workloads and their impact on hardware
D Brooks, MM Frank, T Gokmen, U Gupta, XS Hu, S Jain, AF Laguna, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
2020
Approximate Memory Compression
A Ranjan, A Raha, V Raghunathan, A Raghunathan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (4), 980-991, 2020
2020
Apparatuses, methods, and systems for neural networks
S Venkataramani, D Das, A Ranjan, S Banerjee, S Avancha, ...
US Patent App. 16/317,497, 2019
2019
Apparatuses, methods, and systems for access synchronization in a shared memory
S Venkataramani, D Das, S Avancha, A Ranjan, S Banerjee, K Bharat, ...
US Patent App. 16/317,501, 2019
2019
Approximate cache memory
A Ranjan, S Venkataramani, Z Pajouhi, R VENKATESAN, K Roy, ...
US Patent App. 16/362,672, 2019
2019
Memory controller that forces prefetches in response to a present row address change timing constraint
A Ranjan, V Kozhikkottu
US Patent 10,268,585, 2019
2019
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Articles 1–20