Sri Harsha Choday
Sri Harsha Choday
Intel Labs
Verified email at intel.com
Title
Cited by
Cited by
Year
Loihi: A neuromorphic manycore processor with on-chip learning
M Davies, N Srinivasa, TH Lin, G Chinya, Y Cao, SH Choday, G Dimou, ...
IEEE Micro 38 (1), 82-99, 2018
6012018
KNACK: A hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells
X Fong, SK Gupta, NN Mojumder, SH Choday, C Augustine, K Roy
2011 International Conference on Simulation of Semiconductor Processes and …, 2011
1352011
A three-terminal dual-pillar STT-MRAM for high-performance robust memory applications
NN Mojumder, SK Gupta, SH Choday, DE Nikonov, K Roy
IEEE transactions on electron devices 58 (5), 1508-1516, 2011
1152011
Bit-Cell Level Optimization for Non-volatile Memories Using Magnetic Tunnel Junctions and Spin-Transfer Torque Switching
X Fong, SH Choday, K Roy
Nanotechnology, IEEE Transactions on 11 (1), 172 - 181, 2012
892012
Spin-transfer torque memories: Devices, circuits, and systems
X Fong, Y Kim, R Venkatesan, SH Choday, A Raghunathan, K Roy
Proceedings of the IEEE 104 (7), 1449-1488, 2016
762016
Failure mitigation techniques for 1T-1MTJ spin-transfer torque MRAM bit-cells
X Fong, Y Kim, SH Choday, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 384-395, 2013
682013
Spin-Transfer Torque MRAMs for Low Power Memories: Perspective and Prospective
C Augustine, N Mojumder, X Fong, H Choday, S Park, K Roy
Sensors Journal, IEEE, 1-1, 2011
622011
SPICE models for magnetic tunnel junctions based on monodomain approximation
X Fong, SH Choday, P Georgios, C Augustine, K Roy
572013
DSH-MRAM: Differential spin Hall MRAM for on-chip memories
Y Kim, SH Choday, K Roy
IEEE Electron Device Letters 34 (10), 1259-1261, 2013
532013
SHE-NVFF: Spin Hall effect-based nonvolatile flip-flop for power gating architecture
KW Kwon, SH Choday, Y Kim, X Fong, SP Park, K Roy
IEEE Electron Device Letters 35 (4), 488-490, 2014
522014
Spin orbit torque based electronic neuron
A Sengupta, SH Choday, Y Kim, K Roy
Applied Physics Letters 106 (14), 143701, 2015
512015
AWARE (asymmetric write architecture with redundant blocks): A high write speed STT-MRAM cache architecture
KW Kwon, SH Choday, Y Kim, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (4), 712-720, 2013
462013
Prospects of thin-film thermoelectric devices for hot-spot cooling and on-chip energy harvesting
SH Choday, MS Lundstrom, K Roy
IEEE Transactions on Components, Packaging and Manufacturing Technology 3 …, 2013
322013
Atomistic tight-binding based evaluation of impact of gate underlap on source to drain tunneling in 5 nm gate length Si FinFETs
AA Goud, SK Gupta, SH Choday, K Roy
71st Device Research Conference, 51-52, 2013
182013
STT-MRAMs for future universal memories: Perspective and prospective
C Augustine, N Mojumder, X Fong, H Choday, SP Park, K Roy
2012 28th International Conference on Microelectronics Proceedings, 349-355, 2012
172012
Write-optimized STT-MRAM bit-cells using asymmetrically doped transistors
SH Choday, SK Gupta, K Roy
IEEE Electron Device Letters 35 (11), 1100-1102, 2014
162014
On-chip energy harvesting using thin-film thermoelectric materials
SH Choday, C Lu, V Raghunathan, K Roy
Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), 99-104, 2013
132013
Sensitivity analysis and optimization of thin-film thermoelectric coolers
S Harsha Choday, K Roy
Journal of Applied Physics 113 (21), 214906, 2013
112013
Dual pillar spin-transfer torque MRAMs for low power applications
NN Mojumder, X Fong, C Augustine, SK Gupta, SH Choday, K Roy
ACM Journal on Emerging Technologies in Computing Systems (JETC) 9 (2), 1-17, 2013
102013
Exploration of device-circuit interactions in FinFET-based memories for sub-15nm technologies using a mixed mode quantum simulation framework: Atoms to systems
SK Gupta, SH Choday, K Roy
2011 International Electron Devices Meeting, 32.5. 1-32.5. 4, 2011
92011
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Articles 1–20