Lu Liu
Cited by
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IEEE International Electron Devices Meeting (IEDM)
CH Jan, M Agostinelli, M Buehler, ZP Chen, SJ Choi, G Curello, ...
San Francisco, USA, 3.1, 2012
Scaling Length Theory of Double-Gate Interband Tunnel Field-Effect Transistors
L Liu, D Mohata, S Datta
Electron Devices, IEEE Transactions on 59 (4), 902-908, 2012
Electron Transport in Multigate InxGa1–x As Nanowire FETs: From Diffusive to Ballistic Regimes at Room Temperature
AV Thathachary, N Agrawal, L Liu, S Datta
Nano letters 14 (2), 626-633, 2014
Energy-Delay Performance of Nanoscale Transistors Exhibiting Single Electron Behavior and Associated Logic Circuits
V Saripalli, L Liu, S Datta, V Narayanan
Journal of Low Power Electronics 6 (3), 415-428, 2010
Device circuit co-design using classical and non-classical III–V multi-gate quantum-well FETs (MuQFETs)
L Liu, V Saripalli, V Narayanan, S Datta
2011 International Electron Devices Meeting, 4.5. 1-4.5. 4, 2011
A programmable ferroelectric single electron transistor
L Liu, V Narayanan, S Datta
Applied Physics Letters 102 (5), 053505, 2013
A Reconfigurable Low-Power BDD Logic Architecture Using Ferroelectric Single-Electron Transistors
Lu Liu,Xueqing Li, Vijay Narayanan, Suman Datta
Electron Devices, IEEE Transactions on 62 (3), 1052 - 1057, 2015
Multi-gate modulation doped In0. 7Ga0. 3 as quantum well FET for ultra low power digital logic
L Liu, V Saripalli, E Hwang, V Narayanan, S Datta
ECS Transactions 35 (3), 311, 2011
Impact of fin width scaling on carrier transport in III-V FinFETs
AV Thathachary, L Liu, S Datta
71st Device Research Conference, 17-18, 2013
Investigation of the scalability of ultra thin body (UTB) double gate tunnel FET using physics based 2D analytical model
L Liu, S Datta
68th Device Research Conference, 15-16, 2010
Implications of record peak current density In0.53Ga0.47As Esaki tunnel diode on Tunnel FET logic applications
DK Mohata, D Pawlik, L Liu, S Mookerjea, V Saripalli, S Rommel, S Datta
68th Device Research Conference, 103-104, 2010
(Keynote) III-V Compound Semiconductor Field Effect Transistors for Low Power Digital Logic
S Datta, AV Thathachary, L Liu, E Hwang, A Agrawal, N Agrawal
ECS Transactions 53 (3), 3, 2013
Experimental investigation of scalability and transport in In0.7Ga0.3As multi-gate quantum well FET (MuQFET)
L Liu, V Saripalli, V Narayanan, S Datta
69th Device Research Conference, 17-18, 2011
Compound semiconductor based tunnel transistor logic
S Datta, S Mookerjea, D Mohata, L Liu, V Saripalli, V Narayanan, T Mayer
Proc. 20th CS MANTECH Conf., 203-206, 2010
High Strength and Corrosion Resistant Light Alloys Via High-Energy Ball Milling
RK Gupta, J Esquivel
ECS Meeting Abstracts, 720, 2017
Classical And Coulomb Blockade Iii-v Multi-gate Quantum Well Field Effect Transistors For Ultra Low Power Logic Applications
L Liu
Experimental Demonstration of Modulation Doped In0. 52Al0. 48As/In0. 7Ga0. 3As/In0. 52Al0. 48As Quantum Well FINFET with Split Wrapped Gates
L Liu, V Saripalli, E Hwang, V Narayanan, S Datta
ECS Meeting Abstracts, 1215, 2011
Non-silicon logic elements on silicon for extreme voltage scaling
S Datta, A Ali, S Mookerjea, V Saripalli, L Liu, S Eachempati, T Mayer, ...
2010 Silicon Nanoelectronics Workshop, 1-2, 2010
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