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Pierre Greisen
Pierre Greisen
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Verified email at iis.ee.ethz.ch - Homepage
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Cited by
Cited by
Year
Computational stereo camera system with programmable control loop
S Heinzle, P Greisen, D Gallup, C Chen, D Saner, A Smolic, A Burg, ...
ACM Transactions on Graphics (TOG) 30 (4), 1-10, 2011
962011
An FPGA-based processing pipeline for high-definition stereo video
P Greisen, S Heinzle, M Gross, AP Burg
EURASIP Journal on Image and Video Processing 2011, 1-13, 2011
862011
Real-time velocity estimation based on optical flow and disparity matching
D Honegger, P Greisen, L Meier, P Tanskanen, M Pollefeys
2012 IEEE/RSJ International Conference on Intelligent Robots and Systems …, 2012
692012
Automatic view synthesis by image-domain-warping
N Stefanoski, O Wang, M Lang, P Greisen, S Heinzle, A Smolic
IEEE Transactions on Image Processing 22 (9), 3329-3341, 2013
542013
Implementation of greedy algorithms for LTE sparse channel estimation
P Maechler, P Greisen, B Sporrer, S Steiner, N Felber, A Burg
2010 Conference Record of the Forty Fourth Asilomar Conference on Signals …, 2010
452010
Evaluation and FPGA implementation of sparse linear solvers for video processing applications
P Greisen, M Runo, P Guillet, S Heinzle, A Smolic, H Kaeslin, M Gross
IEEE Transactions on Circuits and Systems for Video Technology 23 (8), 1402-1407, 2013
342013
Matching pursuit: Evaluation and implementatio for LTE channel estimation
P Maechler, P Greisen, N Felber, A Burg
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
322010
Computational stereoscopic camera system
S Heinzle, P Greisen, A Smolic, W Matusik, M Gross
US Patent 9,237,331, 2016
302016
A 4-stream 802.11 n baseband transceiver in 0.13 µm CMOS
A Burg, S Haene, M Borgmann, D Baum, T Thaler, F Carbognani, ...
2009 Symposium on VLSI Circuits, 282-283, 2009
262009
Algorithm and VLSI architecture for real-time 1080p60 video retargeting
P Greisen, M Lang, S Heinzle, A Smolic
Proceedings of the Fourth ACM SIGGRAPH/Eurographics Conference on High …, 2012
242012
Disparity-aware stereo 3d production tools
A Smolic, S Poulakos, S Heinzle, P Greisen, M Lang, A Hornung, M Farre, ...
2011 Conference for Visual Media Production, 165-173, 2011
232011
Video retargeting using content-dependent scaling vectors
P Greisen, AAA Smolic, S Heinzle, M Lang
US Patent 9,202,258, 2015
142015
Analysis and VLSI implementation of EWA rendering for real-time HD video applications
P Greisen, M Schaffner, S Heinzle, M Runo, A Smolic, A Burg, H Kaeslin, ...
IEEE transactions on circuits and systems for video technology 22 (11), 1577 …, 2012
142012
An FPGA-based processing pipeline for high-definition stereo video. EURASIP J
P Greisen, S Heinzle, M Gross, AP Burg
Image Video Process 18 (10.1186), 1687-5281, 2011
142011
Hybrid ASIC/FPGA system for fully automatic stereo-to-multiview conversion using IDW
M Schaffner, FK Gürkaynak, P Greisen, H Kaeslin, L Benini, A Smolic
IEEE Transactions on Circuits and Systems for Video Technology 26 (11), 2093 …, 2015
112015
Simulation and emulation of MIMO wireless baseband transceivers
P Greisen, S Haene, A Burg
EURASIP Journal on Wireless Communications and Networking 2010, 34, 2009
112009
Efficient stereo to multiview rendering using interleaved rendering
AAA Smolic, P Greisen, S Heinzle, M Schaffner, F Ka
US Patent 9,565,414, 2017
92017
MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping
M Schaffner, P Greisen, S Heinzle, FK Gürkaynak, H Kaeslin, A Smolic
2013 Proceedings of the ESSCIRC (ESSCIRC), 61-64, 2013
82013
A real-time 720p feature extraction core based on semantic kernels binarized
M Schaffner, P Hager, L Cavigelli, P Greisen, FK Gürkaynak, H Kaeslin
2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013
72013
A complete real-time feature extraction and matching system based on semantic kernels binarized
M Schaffner, PA Hager, L Cavigelli, Z Fang, P Greisen, FK Gürkaynak, ...
VLSI-SoC: At the Crossroads of Emerging Trends: 21st IFIP WG 10.5/IEEE …, 2015
52015
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Articles 1–20