Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. K Paulsson, M Hübner, S Bayar, J Becker ReCoSoC, 1-6, 2007 | 57 | 2007 |
Dynamic partial self-reconfiguration on spartan-iii fpgas via a parallel configuration access port (pcap) S Bayar, A Yurdakul 2nd HiPEAC workshop on Reconfigurable Computing, HiPEAC 8, 20, 2008 | 39 | 2008 |
Self-reconfiguration on Spartan-III FPGAs with compressed partial bitstreams via a parallel configuration access port (cPCAP) core S Bayar, A Yurdakul Research in Microelectronics and Electronics 2008, 137-140, 2008 | 32 | 2008 |
Efficient implementations of multi-pumped multi-port register files in FPGAs HE Yantir, S Bayar, A Yurdakul 2013 Euromicro Conference on Digital System Design, 185-192, 2013 | 30 | 2013 |
A self-reconfigurable platform for general purpose image processing systems on low-cost spartan-6 FPGAs S Bayar, A Yurdakul, M Tukel 6th International Workshop on Reconfigurable Communication-centric Systems …, 2011 | 13 | 2011 |
An efficient mapping algorithm on 2-d mesh network-on-chip with reconfigurable switches S Bayar, A Yurdakul 2016 International Conference on Design and Technology of Integrated Systems …, 2016 | 12 | 2016 |
A dynamically reconfigurable communication architecture for multicore embedded systems S Bayar, A Yurdakul Journal of Systems Architecture 58 (3-4), 140-159, 2012 | 8 | 2012 |
Fpga implementation of cnn algorithm for detecting malaria diseased blood cells S Sağlam, F Tat, S Bayar 2019 International Symposium on Advanced Electrical and Communication …, 2019 | 7 | 2019 |
FPGA Based Bluetooth Controlled Land Vehicle G Tatar, S Bayar 2018 International Symposium on Advanced Electrical and Communication …, 2018 | 6 | 2018 |
PFMAP: Exploitation of Particle Filters for Network-on-Chip Mapping S Bayar, A Yurdakul IEEE Transactions on Very Large Scale Integration (VLSI) Systems 10 (23 …, 2015 | 6 | 2015 |
FPGA based fault distance detection and positioning of underground energy cable by using GSM/GPRS G Tatar, O Kılıç, S Bayar 2019 International Symposium on Advanced Electrical and Communication …, 2019 | 5 | 2019 |
Performance analysis of e-Archive invoice processing on different embedded platforms S Bayar 2016 IEEE 10th International Conference on Application of Information and …, 2016 | 5 | 2016 |
Türkiye'de ve Avrupa'da E-Fatura Uygulaması S Bayar, MG Ülkar, U Doğan Akademik Bilişim 15, 2015 | 5 | 2015 |
E-Defter ve E-Fatura Teknik Analizi: Örnek Bir Uygulama S Bayar, MG Ülkar Vergi Sorunları Dergisi 38 (2015), 102-110, 2015 | 5 | 2015 |
FPGA implementation of 32-bit RISC-V processor with web-based assembler-disassembler E Gür, ZE Sataner, YH Durkaya, S Bayar 2018 International Symposium on Fundamentals of Electrical Engineering …, 2018 | 4 | 2018 |
Otomatik Ses Tanıma: Türkçe için Genel Dağarcıklı Akustik Model Oluşturulması ve Test Edilmesi C Özbey, S Bayar Akademik Bilişim, 8-10, 2017 | 3 | 2017 |
Reconfigurable Network-On-Chip (NoC) Architectures for Embedded Systems S Bayar PhD. Thesis Bogaziçi University, 2015 | 2 | 2015 |
E-Defter Mizan Raporu Uygulaması Geliştirme Deneyimleri MG Ülkar, S Bayar TBD, 2014 | 2 | 2014 |
Parallel Implenetation of the GPR Techniques for Detecting and Mapping Ancient Buildings by Using CUDA MC Mumcu, S Bayar Avrupa Bilim ve Teknoloji Dergisi, 352-359, 2020 | 1 | 2020 |
FPGA Based Step Motor Control For Solar Panels G Tatar, S Bayar, M Alkan 2019 IEEE 13th International Conference on Application of Information and …, 2019 | 1 | 2019 |