An experimental study of reduced-voltage operation in modern FPGAs for neural network acceleration B Salami, EB Onural, IE Yuksel, F Koc, O Ergin, AC Kestelman, O Unsal, ... 2020 50th Annual IEEE/IFIP International Conference on Dependable Systems …, 2020 | 51 | 2020 |
MoRS: An Approximate Fault Modeling Framework for Reduced-Voltage SRAMs IE Yüksel, B Salami, O Ergin, OS Unsal, AC Kestelman IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 6 | 2021 |
PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips IE Yuksel, YC Tugrul, F Bostanci, AG Yaglikci, A Olgun, GF Oliveira, ... arXiv preprint arXiv:2312.02880, 2023 | 4 | 2023 |
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis İE Yüksel, YC Tuğrul, A Olgun, FN Bostancı, AG Yağlıkçı, GF Oliveira, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 3 | 2024 |
ABACuS: All-Bank Activation Counters for Scalable and Low Overhead RowHammer Mitigation A Olgun, YC Tugrul, N Bostanci, IE Yuksel, H Luo, S Rhyner, AG Yaglikci, ... arXiv preprint arXiv:2310.09977, 2024 | 3 | 2024 |
TuRaN: True random number generation using supply voltage underscaling in SRAMs İE Yüksel, A Olgun, B Salami, F Bostancı, YC Tuğrul, AG Yağlıkçı, ... arXiv preprint arXiv:2211.10894, 2022 | 2 | 2022 |
Demonstrating reduced-voltage FPGA-based neural network acceleration for power-efficiency EB Onural, IE Yuksel, B Salami 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 2 | 2020 |
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost FN Bostanci, ISE Yüksel, A Olgun, K Kanellopoulos, YC Tuğrul, ... 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 1 | 2024 |
Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions AG Yağlıkçı, YC Tuğrul, GF Oliveira, İE Yüksel, A Olgun, H Luo, O Mutlu arXiv preprint arXiv:2402.18652, 2024 | 1 | 2024 |
Amplifying Main Memory-Based Timing Covert and Side Channels using Processing-in-Memory Operations K Kanellopoulos, F Bostanci, A Olgun, AG Yaglikci, IE Yuksel, NM Ghiasi, ... arXiv preprint arXiv:2404.11284, 2024 | | 2024 |
Düsük-gerilimli SRAM aygitlari için gerçek rastgele sayi üretme ve hata modelleme yöntemleri İE Yüksel TOBB ETÜ, 2022 | | 2022 |