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Kia Bazargan
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An architecture for fault-tolerant computation with stochastic logic
W Qian, X Li, MD Riedel, K Bazargan, DJ Lilja
IEEE transactions on computers 60 (1), 93-105, 2010
4852010
Fast template placement for reconfigurable computing systems
K Bazargan, R Kastner, M Sarrafzadeh
IEEE design & Test of Computers 17 (1), 68-83, 2000
4512000
Exploring potential benefits of 3D FPGA integration
C Ababei, P Maidee, K Bazargan
Field Programmable Logic and Application: 14th International Conference, FPL …, 2004
2902004
Computation on stochastic bit streams digital image processing case studies
P Li, DJ Lilja, W Qian, K Bazargan, MD Riedel
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (3), 449-462, 2013
2862013
A tileable switch module architecture for homogeneous 3D FPGAs
SA Razavi, MS Zamani, K Bazargan
2009 IEEE International Conference on 3D System Integration, 1-4, 2009
2392009
Placement and routing in 3D integrated circuits
C Ababei, Y Feng, B Goplen, H Mogal, T Zhang, K Bazargan, ...
IEEE Design & Test of Computers 22 (6), 520-531, 2005
2182005
Fast Timing-driven Partitioning-based Placement for Island Style FPGAs
P Maidee, C Ababei, K Bazargan
Design Automation Conference, 598-603, 2003
183*2003
Three-dimensional place and route for FPGAs
C Ababei, H Mogal, K Bazargan
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
1422005
Axilog: Language support for approximate hardware design
A Yazdanbakhsh, D Mahajan, B Thwaites, J Park, A Nagendrakumar, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 812-817, 2015
952015
Multi-objective circuit partitioning for cutsize and path-based delay minimization
C Ababei, N Selvakkumaran, K Bazargan, G Karypis
Proceedings of the 2002 IEEE/ACM international conference on computer-aided …, 2002
952002
Logical computation on stochastic bit streams with linear finite-state machines
P Li, DJ Lilja, W Qian, MD Riedel, K Bazargan
IEEE Transactions on Computers 63 (6), 1474-1486, 2012
912012
The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic
P Li, DJ Lilja, W Qian, K Bazargan, M Riedel
Proceedings of the International Conference on Computer-Aided Design, 480-487, 2012
822012
Energy-efficient convolutional neural networks with deterministic bit-stream processing
SR Faraji, MH Najafi, B Li, DJ Lilja, K Bazargan
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
782019
Low-cost sorting network circuits using unary processing
MH Najafi, DJ Lilja, MD Riedel, K Bazargan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (8 …, 2018
762018
Time-encoded values for highly efficient stochastic circuits
MH Najafi, S Jamali-Zavareh, DJ Lilja, MD Riedel, K Bazargan, R Harjani
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (5 …, 2017
712017
IIR filters using stochastic arithmetic
N Saraf, K Bazargan, DJ Lilja, MD Riedel
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
712014
HARP: hard-wired routing pattern FPGAs
S Sivaswamy, G Wang, C Ababei, K Bazargan, R Kastner, E Bozorgzadeh
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005
682005
3-D floorplanning: simulated annealing and greedy placement methods for reconfigurable computing systems
K Bazargan, R Kastner, M Sarrafzadeh
Design Automation for Embedded Systems 5, 329-338, 2000
612000
Incremental placement for timing optimization
W Choi, K Bazargan
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
592003
The synthesis of linear finite state machine-based stochastic computational elements
P Li, W Qian, MD Riedel, K Bazargan, DJ Lilja
17th Asia and South Pacific Design Automation Conference, 757-762, 2012
582012
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Articles 1–20