Daniele Bortolotti
Daniele Bortolotti
R&D Engineer
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Virtualsoc: A full-system simulation environment for massively parallel heterogeneous system-on-chip
D Bortolotti, C Pinto, A Marongiu, M Ruggiero, L Benini
Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW …, 2013
532013
Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor
D Bortolotti, H Mamaghanian, A Bartolini, M Ashouei, J Stuijt, D Atienza, ...
2014 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2014
412014
An Ultra-Low Power Dual-mode ECG Monitor for Healthcare and Wellness
D Bortolotti, M Mangia, A Bartolini, R Rovatti, G Setti, L Benini
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2015, 2015
292015
Energy-Aware Bio-signal Compressed Sensing Reconstruction on the WBSN-gateway
D Bortolotti, M Mangia, A Bartolini, R Rovatti, G Setti, L Benini
IEEE Transactions on Emerging Topics in Computing, 1, 2016
282016
Energy analysis of decoders for rakeness-based compressed sensing of ECG signals
F Pareschi, M Mangia, D Bortolotti, A Bartolini, L Benini, R Rovatti, G Setti
IEEE transactions on biomedical circuits and systems 11 (6), 1278-1289, 2017
242017
Exploring instruction caching strategies for tightly-coupled shared-memory clusters
D Bortolotti, F Paterna, C Pinto, A Marongiu, M Ruggiero, L Benini
2011 International Symposium on System on Chip (SoC), 34-41, 2011
232011
A synchronization-based hybrid-memory multi-core architecture for energy-efficient biomedical signal processing
R Braojos, D Bortolotti, A Bartolini, G Ansaloni, L Benini, D Atienza
IEEE Transactions on Computers 66 (4), 575-585, 2017
202017
Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks
M Mangia, D Bortolotti, F Pareschi, A Bartolini, L Benini, R Rovatti, G Setti
Microprocessors and Microsystems 48, 69-79, 2017
172017
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors
D Bortolotti, A Bartolini, C Weis, D Rossi, L Beninio
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
172014
Rakeness-based Compressed Sensing on Ultra-low Power Multi-core Biomedical Processors
D Bortolotti, M Mangia, A Bartolini, R Rovatti, G Setti, L Benini
Design and Architectures for Signal and Image Processing (DASIP), 2014 …, 2014
152014
Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs
JL Abellán, J Fernández, ME Acacio, D Bertozzi, D Bortolotti, A Marongiu, ...
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 491-496, 2012
142012
Energy-Aware Bio-signal Compressed Sensing Reconstruction: FOCUSS on the WBSN-gateway
D Bortolotti, A Bartolini, M Mangia, R Rovatti, G Setti, L Benini
IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on …, 2015
122015
Quantifying the benefits of compressed sensing on a WBSN-based real-time biosignal monitor
D Bortolotti, B Milosevic, A Bartolini, E Farella, L Benini
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 732-737, 2016
92016
User-space APIs for Dynamic Power Managementin Many-core ARMv8 Computing Nodes
D Bortolotti, S Tinti, P Altoé, A Bartolini
High Performance Computing & Simulation (HPCS), 2016 International …, 2016
82016
VirtualSoC: a Research Tool for Modern MPSoCs
D Bortolotti, A Marongiu, L Benini
ACM Transactions on Embedded Computing Systems 16 (1), 2016
72016
A variation tolerant architecture for ultra low power multi-processor cluster
D Bortolotti, D Rossi, A Bartolini, L Benini
2013 23rd International Workshop on Power and Timing Modeling, Optimization …, 2013
42013
An ambient temperature variation tolerance scheme for an ultra low power shared-L1 processor cluster
D Bortolotti, A Bartolini, L Benini
2013 Euromicro Conference on Digital System Design, 625-632, 2013
42013
Long-Term ECG Monitoring with Zeroing Compressed Sensing Approach
M Mangia, D Bortolotti, A Bartolini, F Pareschi, L Benini, R Rovatti, G Setti
IEEE Nordic Circuits and Systems Conference (NORCAS), 2015
32015
PHIDIAS: ultra-low-power holistic design for smart bio-signals computing platforms
D Bortolotti, A Bartolini, L Benini, VR Pamula, N Van Helleputte, ...
Proceedings of the ACM International Conference on Computing Frontiers, 309-314, 2016
22016
An ultra-low power resilient multi-core architecture with static and dynamic tolerance to ambient temperature-induced variability
D Bortolotti, A Bartolini, L Benini
Microprocessors and Microsystems 38 (8), 776-787, 2014
22014
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Articles 1–20