Roman Pletka
Title
Cited by
Cited by
Year
Write amplification analysis in flash-based solid state drives
XY Hu, E Eleftheriou, R Haas, I Iliadis, R Pletka
Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference, 1-9, 2009
4112009
Method to efficiently locate meta-data structures on a flash-based storage device
R Haas, XY Hu, RA Pletka
US Patent 8,250,324, 2012
2272012
Cryptographic security for a high-performance distributed file system
R Pletka, C Cachin
24th IEEE Conference on Mass Storage Systems and Technologies (MSST 2007 …, 2007
572007
Cryptographic security for a high-performance distributed file system
R Pletka, C Cachin
24th IEEE Conference on Mass Storage Systems and Technologies (MSST 2007 …, 2007
572007
Cache memory management in a flash cache architecture
ES Eleftheriou, R Haas, XY Hu, RA Pletka
US Patent 8,688,900, 2014
552014
Wear leveling of a memory array
TJ Fisher, AD Fry, N Ioannou, I Koltsidas, J Ma, RA Pletka, LT Simmons, ...
US Patent 9,857,986, 2018
532018
Bringing efficient advanced queries to distributed hash tables
D Bauer, P Hurley, R Pletka, M Waldvogel
29th Annual IEEE International Conference on Local Computer Networks, 6-14, 2004
482004
A comparison of secure multi-tenancy architectures for filesystem storage clouds
A Kurmus, M Gupta, R Pletka, C Cachin, R Haas
ACM/IFIP/USENIX International Conference on Distributed Systems Platforms …, 2011
442011
Reliability scheme using hybrid SSD/HDD replication with log structured management
ES Eleftheriou, R Haas, X Hu, RA Pletka
US Patent 8,700,949, 2014
432014
Encryption and authentication of data and for decryption and verification of authenticity of data
C Cachin, PT Hurley, RA Pletka
US Patent App. 11/622,467, 2008
422008
Cooperative data deduplication in a solid state storage array
TJ Fisher, N Ioannou, I Koltsidas, RA Pletka, S Tomic
US Patent 10,013,169, 2018
402018
Logical to physical address mapping in storage systems comprising solid state memory devices
W Bux, R Haas, XY Hu, R Pletka
US Patent 9,256,527, 2016
402016
Logical to physical address mapping in storage systems comprising solid state memory devices
W Bux, R Haas, XY Hu, R Pletka
US Patent 9,256,527, 2016
402016
Flow control in network devices
HE Bowen Jr, P Droz, CD Jeffries, L Kencl, A Kind, SV Mannal, RA Pletka
US Patent 7,260,062, 2007
382007
Flow control in network devices
HE Bowen Jr, P Droz, CD Jeffries, L Kencl, A Kind, SV Mannal, RA Pletka
US Patent 7,260,062, 2007
382007
Flow control in network devices
HE Bowen Jr, P Droz, CD Jeffries, L Kencl, A Kind, SV Mannal, RA Pletka
US Patent 7,260,062, 2007
382007
Times
D Time
352005
Write cache structure in a storage system
I Koltsidas, R Pletka
US Patent 8,990,502, 2015
312015
Searching a range in a set of values in a network with distributed storage entities
M Waldvogel, RA Pletka
US Patent 8,880,502, 2014
312014
Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management
CJ Camp, TJ Fisher, AD Fry, N Ioannou, R Pletka, S Tomic
US Patent 9,563,373, 2017
302017
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