| Interstellar: Using halide's scheduling language to analyze dnn accelerators X Yang, M Gao, Q Liu, J Setter, J Pu, A Nayak, S Bell, K Cao, H Ha, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 223 | 2020 |
| DNN dataflow choice is overrated X Yang, M Gao, J Pu, A Nayak, Q Liu, SE Bell, JO Setter, K Cao, H Ha, ... arXiv preprint arXiv:1809.04070 6, 5, 2018 | 101 | 2018 |
| Improving energy efficiency of dram by exploiting half page row access H Ha, A Pedram, S Richardson, S Kvatinsky, M Horowitz 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 22 | 2016 |
| CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM N Talati, H Ha, B Perach, R Ronen, S Kvatinsky IEEE Micro 39 (1), 33-43, 2019 | 18 | 2019 |
| ERUCA: Efficient DRAM resource utilization and resource conflict avoidance for memory system parallelism S Lym, H Ha, Y Kwon, C Chang, J Kim, M Erez 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 13 | 2018 |
| Understanding and improving the energy efficiency of DRAM H Ha Stanford University, 2018 | 1 | 2018 |
| Interstellar X Yang, M Gao, Q Liu, J Setter, J Pu, A Nayak, S Bell, K Cao, H Ha, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | | 2020 |
