| A New Cache Replacement Algorithm for Last-Level Caches by Exploiting Tag-Distance Correlation of Cache Lines CT Do, HJ Choi, JM Kim, CH Kim Microprocessors and Microsystems 39 (4-5), 286-295, 2015 | 12 | 2015 |
| A Novel Warp Scheduling Scheme Considering Long-Latency Operations for High-Performance GPUs CT Do, HJ Choi, SW Chung, CH Kim The Journal of Supercomputing 76, 3043-3062, 2020 | 9 | 2020 |
| A Dynamic CTA Scheduling Scheme for Massive Parallel Computing DO Son, CT Do, HJ Choi, J Nam, CH Kim Cluster Computing 20, 781-787, 2017 | 8 | 2017 |
| Early Miss Prediction based Periodic Cache Bypassing for High Performance GPUs CT Do, JM Kim, CH Kim Microprocessors and Microsystems 55, 44-54, 2017 | 7 | 2017 |
| Enhancing Matrix Multiplication with a Monolithic 3-D-based Scratchpad Memory CT Do, JH Choi, YS Lee, CH Kim, SW Chung IEEE Embedded Systems Letters 13 (2), 57-60, 2020 | 6 | 2020 |
| Application Characteristics-Aware Sporadic Cache Bypassing for High Performance GPGPUs CT Do, JM Kim, CH Kim Journal of Parallel and Distributed Computing 122, 238-250, 2018 | 6 | 2018 |
| Exploring the Relation between Monolithic 3D L1 GPU Cache Capacity and Warp Scheduling Efficiency CT Do, YH Gong, CH Kim, SW Kim, SW Chung 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 5 | 2019 |
| NTB Branch Predictor: Dynamic Branch Predictor for High-Performance Embedded Processors CT Do, HJ Choi, DO Son, JM Kim, CH Kim The Journal of Supercomputing 72, 1679-1693, 2016 | 3 | 2016 |
| CTA-Aware Dynamic Scheduling Scheme for Streaming Multiprocessors in High-Performance GPUs DO Son, CT Do, HJ Choi, JM Kim, J Park, CH Kim Information Science and Applications (ICISA) 2016, 1391-1399, 2016 | 3 | 2016 |
| A Novel Last-Level Cache Replacement Policy to Improve the Performance of Mobile Systems CT Do, J Kim, I Hwang, S Kim, CH Kim Adv Sci Technol Lett 46 (Mobile and Wireless 2014), 24-28, 2014 | 3 | 2014 |
| A Novel Cooperative Warp and Thread Block Scheduling Technique for Improving the GPGPU Resource Utilization CT Do, Y Choi, JM Kim, CH Kim KIPS Transactions on Computer and Communication Systems 6 (5), 219-230, 2017 | 2 | 2017 |
| Aggressive GPU Cache Bypassing with Monolithic 3D-based NoC CT Do, CH Kim, SW Chung The Journal of Supercomputing 79 (5), 5421-5442, 2023 | 1 | 2023 |
| Deep Learning-based Prediction of Alertness and Drowsiness using EEG Signals CT Do, AN Le, VD Nguyen, VC Trinh Proceedings of the 12th ACM International Symposium on Information and …, 2023 | | 2023 |
| Aggressive GPU cache bypassing with monolithic 3D-based NoC (Oct, 10.1007/s11227-022-04878-6, 2022) CT Do, CH Kim, SW Chung JOURNAL OF SUPERCOMPUTING 79 (6), 7061-7061, 2023 | | 2023 |
| Correction to: Aggressive GPU cache bypassing with monolithic 3D-based NoC (The Journal of Supercomputing,(2023), 79, 5,(5421-5442), 10.1007/s11227-022-04878-6) CT Do, CH Kim, SW Chung Journal of Supercomputing 79 (6), 7061, 2023 | | 2023 |
| A Monolithic 3D Based Scratchpad Memory Cong Thuan Do, Sung Woo Chung,Young Seo Lee, Jeong Hwan Choi KR Patent 102,443,742, 2022 | | 2022 |
| A GPU Cache Bypassing Method and Apparatus with the Adoption of Monolithic 3D Based Network-on-Chip Cong Thuan Do, Sung Woo Chung, Young Seo Lee KR Patent 102,340,444, 2021 | | 2021 |
| Memory Data Transform Method and Computer for Matrix Multiplication Cong Thuan Do, Sung Woo Chung, Jeong Hwan Choi KR Patent 102,327,234, 2021 | | 2021 |
| Monolithic 3D Integration based L1 Cache Memory for GPUs Cong Thuan Do, Sung Woo Chung, Young Seo Lee KR Patent 102,172,556, 2020 | | 2020 |
| Application Characteristics-Aware Sporadic Cache Bypassing Technique, Streaming Multiprocessor and Embedded System Performed by the Technique Cong Thuan Do, Cheol Hong Kim, Yong Choi KR Patent 101,969,435, 2019 | | 2019 |
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