| Going deeper with embedded fpga platform for convolutional neural network J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ... Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 760 | 2016 |
| PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory P Chi, S Li, C Xu, T Zhang, J Zhao, Y Liu, Y Wang, Y Xie ACM SIGARCH Computer Architecture News 44 (3), 27-39, 2016 | 688 | 2016 |
| ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 371 | 2017 |
| ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ... arXiv preprint arXiv:1612.00694, 2016 | 371* | 2016 |
| Deep gradient compression: Reducing the communication bandwidth for distributed training Y Lin, S Han, H Mao, Y Wang, WJ Dally arXiv preprint arXiv:1712.01887, 2017 | 358 | 2017 |
| Fpmr: Mapreduce framework on fpga Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 186 | 2010 |
| Angel-Eye: A Complete Design Flow for Mapping CNN onto Embedded FPGA K Guo, L Sui, J Qiu, J Yu, J Wang, S Yao, S Han, Y Wang, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 159 | 2018 |
| Enabling FPGAs in the cloud F Chen, Y Shan, Y Zhang, Y Wang, H Franke, X Chang, K Wang Proceedings of the 11th ACM Conference on Computing Frontiers, 1-10, 2014 | 135 | 2014 |
| Scaling-up resistive synaptic arrays for neuro-inspired architecture: Challenges and prospect S Yu, PY Chen, Y Cao, L Xia, Y Wang, H Wu 2015 IEEE International Electron Devices Meeting (IEDM), 17.3. 1-17.3. 4, 2015 | 131 | 2015 |
| Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication L Xia, P Gu, B Li, T Tang, X Yin, W Huangfu, S Yu, Y Cao, Y Wang, ... Journal of Computer Science and Technology 31 (1), 3-19, 2016 | 121 | 2016 |
| Technological Exploration of RRAM Crossbar Array For Matrix-Vector Multiplication Peng Gu, Boxun Li, Tianqi Tang, Shimeng Yu, Yu Cao, Yu Wang, Huazhong Yang Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific …, 2015 | 121* | 2015 |
| Binary convolutional neural network on RRAM T Tang, L Xia, B Li, Y Wang, H Yang 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 782-787, 2017 | 110 | 2017 |
| Exploring the regularity of sparse structure in convolutional neural networks H Mao, S Han, J Pool, W Li, X Liu, Y Wang, WJ Dally arXiv preprint arXiv:1705.08922, 2017 | 107 | 2017 |
| Coordinated static and dynamic cache bypassing for GPUs X Xie, Y Liang, Y Wang, G Sun, T Wang 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 105 | 2015 |
| Temperature-aware NBTI modeling and the impact of input vector control on performance degradation Y Wang, H Luo, K He, R Luo, H Yang, Y Xie Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE'07, 1-6, 2007 | 103 | 2007 |
| RENO: A high-efficient reconfigurable neuromorphic computing accelerator design X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu, ... 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015 | 101 | 2015 |
| Real-Time High-Quality Stereo Vision System in FPGA FHH Wenqiang Wang, Jing Yan, Ningyi Xu, Yu Wang Circuits and Systems for Video Technology, IEEE Transactions on 25 (10 …, 2015 | 91* | 2015 |
| Training Itself: Mixed-signal Training Acceleration for Memristor-based Neural Network B Li, Y Wang, Y Wang, Y Chen, H Yang Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific …, 2014 | 91 | 2014 |
| Real-time high-quality stereo vision system in FPGA W Wang, J Yan, N Xu, Y Wang, FH Hsu Field-Programmable Technology (FPT), 2013 International Conference on, 358-361, 2013 | 91 | 2013 |
| Towards artificial general intelligence with hybrid Tianjic chip architecture J Pei, L Deng, S Song, M Zhao, Y Zhang, S Wu, G Wang, Z Zou, Z Wu, ... Nature 572 (7767), 106-111, 2019 | 89 | 2019 |
Huazhong YangProfessor of Electronics Engineering, Tsinghua UniversityVerified email at tsinghua.edu.cn
