Suman Datta
Suman Datta
Stinson Chair Professor
Verified email at nd.edu - Homepage
Title
Cited by
Cited by
Year
Benchmarking nanotechnology for high-performance and low-power logic transistor applications
R Chau, S Datta, M Doczy, B Doyle, B Jin, J Kavalieros, A Majumdar, ...
IEEE transactions on nanotechnology 4 (2), 153-158, 2005
8202005
High-/spl kappa//metal-gate stack and its MOSFET characteristics
R Chau, S Datta, M Doczy, B Doyle, J Kavalieros, M Metz
IEEE Electron Device Letters 25 (6), 408-410, 2004
664*2004
High performance fully-depleted tri-gate CMOS transistors
BS Doyle, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, T Linton, ...
IEEE Electron Device Letters 24 (4), 263-265, 2003
6272003
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta, SA Hareland
US Patent 6,858,478, 2005
4702005
Two-dimensional gallium nitride realized via graphene encapsulation
ZY Al Balushi, K Wang, RK Ghosh, RA Vilá, SM Eichfeld, JD Caldwell, ...
Nature materials 15 (11), 1166-1171, 2016
4282016
Tri-gate devices and methods of fabrication
RS Chau, BS Doyle, J Kavalieros, D Barlage, S Datta
US Patent 7,358,121, 2008
4122008
Integrated nanoelectronics for the future
R Chau, B Doyle, S Datta, J Kavalieros, K Zhang
Nature materials 6 (11), 810-812, 2007
4082007
Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout
B Doyle, B Boyanov, S Datta, M Doczy, S Hareland, B Jin, J Kavalieros, ...
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2003
3612003
Atomically thin resonant tunnel diodes built from synthetic van der Waals heterostructures
YC Lin, RK Ghosh, R Addou, N Lu, SM Eichfeld, H Zhu, MY Li, X Peng, ...
Nature communications 6 (1), 1-6, 2015
3282015
Tri-gate transistor architecture with high-k gate dielectrics, metal gates and strain engineering
J Kavalieros, B Doyle, S Datta, G Dewey, M Doczy, B Jin, D Lionberger, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 50-51, 2006
3072006
A steep-slope transistor based on abrupt electronic phase transition
N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ...
Nature communications 6 (1), 1-6, 2015
2522015
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
SA Hareland, RS Chau, BS Doyle, R Rios, T Linton, S Datta
US Patent 7,456,476, 2008
2492008
Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
SA Hareland, RS Chau, BS Doyle, R Rios, T Linton, S Datta
US Patent 7,820,513, 2010
2452010
Temperature-DependentCharacteristics of a VerticalTunnel FET
S Mookerjea, D Mohata, T Mayer, V Narayanan, S Datta
IEEE Electron Device Letters 31 (6), 564-566, 2010
2302010
Method and apparatus for improving stability of a 6T CMOS SRAM cell
S Datta, BS Doyle, RS Chau, J Kavalieros, B Zheng, SA Hareland
US Patent 6,970,373, 2005
2252005
Ferroelectric FET analog synapse for acceleration of deep neural network training
M Jerry, PY Chen, J Zhang, P Sharma, K Ni, S Yu, S Datta
2017 IEEE International Electron Devices Meeting (IEDM), 6.2. 1-6.2. 4, 2017
2242017
Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
J Kavalieros, A Cappellani, JK Brask, ML Doczy, MV Metz, S Datta, ...
US Patent 7,569,443, 2009
2232009
Atomic layer deposition of high dielectric constant gate dielectrics
M Metz, C Boyd, M Kuhn, S Datta, J Kavalieros, M Doczy, J Brask, R Chau
US Patent App. 10/943,693, 2006
2202006
Nonplanar device with stress incorporation layer and method of fabrication
SA Hareland, RS Chau, BS Doyle, S Datta, BY Jin
US Patent 6,909,151, 2005
2192005
SRAM and logic transistors with variable height multi-gate transistor architecture
S Datta, BS Doyle, JT Kavalieros, Y Wang
US Patent App. 11/648,521, 2008
2182008
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Articles 1–20