| SkippyNN: An embedded stochastic-computing accelerator for convolutional neural networks R Hojabr, K Givaki, SMR Tayaranian, P Esfahanian, A Khonsari, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 53 | 2019 |
| SPAGHETTI: Streaming Accelerators for Highly Sparse GEMM on FPGAs R Hojabr, A Sedaghati, A Sharifian, A Khonsari, A Shriraman 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 43 | 2021 |
| Power-efficient accelerator design for neural networks using computation reuse A Yasoubi, R Hojabr, M Modarressi IEEE computer architecture letters 16 (1), 72-75, 2016 | 42 | 2016 |
| μir-an intermediate representation for transforming and optimizing the microarchitecture of application accelerators A Sharifian, R Hojabr, N Rahimi, S Liu, A Guha, T Nowatzki, A Shriraman Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 40 | 2019 |
| Customizing clos network-on-chip for neural networks R Hojabr, M Modarressi, M Daneshtalab, A Yasoubi, A Khonsari IEEE Transactions on Computers 66 (11), 1865-1877, 2017 | 38 | 2017 |
| On the resilience of deep learning for reduced-voltage FPGAs K Givaki, B Salami, R Hojabr, SMR Tayaranian, A Khonsari, D Rahmati, ... 2020 28th Euromicro International Conference on Parallel, Distributed and …, 2020 | 20 | 2020 |
| Using residue number systems to accelerate deterministic bit-stream multiplication K Givaki, R Hojabr, MH Najafi, A Khonsari, MH Gholamrezayi, S Gorgin, ... 2019 IEEE 30th International Conference on Application-specific Systems …, 2019 | 10 | 2019 |
| Real-time Hamilton-Jacobi reachability analysis of autonomous system with an fpga M Bui, M Lu, R Hojabr, M Chen, A Shriraman 2021 IEEE/RSJ International Conference on Intelligent Robots and Systems …, 2021 | 9 | 2021 |
| CuPAN–high throughput on-chip interconnection for neural networks A Yasoubi, R Hojabr, H Takshi, M Modarressi, M Daneshtalab Neural Information Processing: 22nd International Conference, ICONIP 2015 …, 2015 | 9 | 2015 |
| X-cache: a modular architecture for domain-specific caches A Sedaghati, M Hakimi, R Hojabr, A Shriraman Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 7 | 2022 |
| Real-time formal verification of autonomous systems with an fpga M Bui, M Lu, R Hojabr, M Chen, A Shriraman arXiv preprint arXiv:2012.04011, 2020 | 6 | 2020 |
| Embedded stochastic-computing accelerator architecture and method for convolutional neural networks DR Mohammadhassan Najafi, Seved Reza Hojabrossadati, Kamyar Givaki, SM Reza ... US Patent App. 17/159,347, 2021 | 5* | 2021 |
| High-performance deterministic stochastic computing using residue number system K Givaki, R Hojabr, MH Gholamrezaei, A Khonsari, S Gorgin, D Rahmati, ... IEEE Design & Test 38 (6), 60-68, 2021 | 4 | 2021 |
| X-Layer: Building Composable Pipelined Dataflows for Low-Rank Convolutions N Vedula, R Hojabr, A Khonsari, A Shriraman 2021 30th International Conference on Parallel Architectures and Compilation …, 2021 | 3 | 2021 |
| TaxoNN: a Light-Weight Accelerator for Deep Neural Network Training R Hojabr, K Givaki, K Pourahmadi, P Nooralinejad, A Khonsari, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020 | 3 | 2020 |
| mu-grind: A Framework for Dynamically Instrumenting HLS-Generated RTL P Vahdatniya, A Sharifian, R Hojabr, A Shriraman Proceedings of the International Conference on Parallel Architectures and …, 2022 | 1 | 2022 |
| Taxonn: a light-weight accelerator for training deep neural networks on the edge M Najaf, R Hojabr, K Givaki, K Pourahmadi, P Nooralinejad, A Khonsari, ... US Patent App. 17/961,396, 2024 | | 2024 |
| Method and architecture for accelerating deterministic stochastic computing using residue number system DR Mohammadhassan Najafi, Kamyar Givaki, Seyed Reza Hojabrossadati, MH ... US Patent App. 17/166,378, 2021 | | 2021 |
| High Performance Interconnection Networks for Neural Network Accelerators R Hojabr School of ECE, University of Tehran, 2021 | | 2021 |
| Feedforward neural networks on massively parallel architectures R Hojabr, A Khonsari, M Modarressi, M Daneshtalab Institution of Engineering and Technology, 2020 | | 2020 |
Ahmad KhonsariAssociate Professor: ECE Department -The University of TehranVerified email at ut.ac.ir
