Lei Zhang
Title
Cited by
Cited by
Year
On topology reconfiguration for defect-tolerant NoC-based homogeneous manycore systems
L Zhang, Y Han, Q Xu, X wei Li, H Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (9 …, 2009
852009
Defect tolerance in homogeneous manycore processors using core-level redundancy with unified topology
L Zhang, Y Han, Q Xu, X Li
Proceedings of the conference on Design, automation and test in Europe, 891-896, 2008
762008
Vertical interconnects squeezing in symmetric 3D mesh network-on-chip
C Liu, L Zhang, Y Han, X Li
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 357-362, 2011
692011
Thermal-constrained task allocation for interconnect energy reduction in 3-D homogeneous MPSoCs
Y Cheng, L Zhang, Y Han, X Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (2), 239-249, 2012
682012
Wear rate leveling: lifetime enhancement of PRAM with endurance variation
J Dong, L Zhang, Y Han, Y Wang, X Li
Proceedings of the 48th Design Automation Conference, 972-977, 2011
532011
Fault tolerance mechanism in chip many-core processors
L Zhang, Y Han, H Li, X Li
Tsinghua Science and Technology 12 (S1), 169-174, 2007
352007
A resilient on-chip router design through data path salvaging
C Liu, L Zhang, Y Han, X Li
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 437-442, 2011
302011
Economizing TSV resources in 3-D network-on-chip design
Y Wang, YH Han, L Zhang, BZ Fu, C Liu, HW Li, X Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (3), 493-506, 2014
272014
ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing
Y Wang, Y Han, L Zhang, H Li, X Li
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
212015
用于片上网络的容错通信算法
张磊, 李华伟, 李晓维
计算机辅助设计与图形学学报 19 (4), 508-514, 2007
202007
Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors
L Zhang, Y Yu, J Dong, Y Han, S Ren, X Li
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
172010
Address remapping for static nuca in noc-based degradable chip-multiprocessors
Y Wang, L Zhang, Y Han, H Li, X Li
2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing …, 2010
142010
Wrapper chain design for testing TSVs minimization in circuit-partitioned 3D SoC
Y Cheng, L Zhang, Y Han, J Liu, X Li
2011 Asian Test Symposium, 181-186, 2011
132011
Hungarian algorithm based virtualization to maintain application timing similarity for defect-tolerant noc
K Yue, F Lockom, Z Li, S Ghalim, S Ren, L Zhang, X Li
17th Asia and South Pacific Design Automation Conference, 493-498, 2012
122012
M-IVC: Using multiple input vectors to minimize aging-induced delay
S Jin, Y Han, L Zhang, H Li, X Li, G Yan
2009 Asian Test Symposium, 437-442, 2009
122009
The Φ-stack for smart web of things
Z Xu, X Peng, L Zhang, D Li, N Sun
Proceedings of the Workshop on Smart Internet of Things, 1-6, 2017
112017
Linear Symmetric Quantization of Neural Networks for Low-precision Integer Hardware
X Zhao, Y Wang, X Cai, C Liu, L Zhang
International Conference on Learning Representations, 2019
82019
TSV Minimization for Circuit—Partitioned 3D SoC Test Wrapper Design
YQ Cheng, L Zhang, YH Han, XW Li
Journal of Computer Science and Technology 28 (1), 119-128, 2013
82013
Data Remapping for Static NUCA in Degradable Chip Multiprocessors
Y Wang, L Zhang, YH Han, HW Li, X Li
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (5), 879 …, 2015
72015
An elastic architecture adaptable to various application scenarios
Y Wu, YJ Chen, TS Chen, Q Guo, L Zhang
Journal of Computer Science and Technology 29 (2), 227-238, 2014
72014
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