Follow
efraim rotem
efraim rotem
Verified email at intel.com
Title
Cited by
Cited by
Year
Power-management architecture of the intel microarchitecture code-named sandy bridge
E Rotem, A Naveh, A Ananthakrishnan, E Weissmann, D Rajwan
Ieee micro 32 (2), 20-27, 2012
6062012
Method and apparatus to control power consumption of a plurality of processor cores
E Rotem, O Lamdan, A Naveh
US Patent 8,650,424, 2014
2112014
Inside 6th-generation intel core: New microarchitecture code-named skylake
J Doweck, WF Kao, AK Lu, J Mandelblat, A Rahatekar, L Rappoport, ...
IEEE Micro 37 (2), 52-62, 2017
2002017
Power and Thermal Management in the Intel Core Duo Processor.
A Naveh, E Rotem, A Mendelson, S Gochman, R Chabukswar, ...
Intel Technology Journal 10 (2), 2006
1952006
Dynamically allocating a power budget over multiple domains of a processor
AN Ananthakrishnan, E Rotem, D Rajwan, E Weissmann, N Shulman
US Patent 8,769,316, 2014
1842014
Power management coordination in multi-core processors
A Naveh, E Rotem, E Weissmann
US Patent 7,966,511, 2011
1682011
Dynamically controlling cache size to maximize energy efficiency
AN Ananthakrishnan, E Rotem, E Weissmann, D Rajwan, N Shulman, ...
US Patent 9,158,693, 2015
1632015
Controlling a turbo mode frequency of a processor
AN Ananthakrishnan, E Rotem, D Rajwan, E Wiessman, R Wells, ...
US Patent 8,943,340, 2015
1632015
Enabling a non-core domain to control memory bandwidth in a processor
AN Ananthakrishnan, IM Sodhi, E Rotem, D Rajwan, E Wiessman, ...
US Patent 8,832,478, 2014
1472014
Controlling temperature of multiple domains of a multi-domain processor using a cross domain margin
AN Ananthakrishan, T Ziv, D Rajwan, E Rotem
US Patent 8,954,770, 2015
1462015
Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor
AN Ananthakrishnan, E Rotem, D Rajwan, JJ Shrall, EC Samson, ...
US Patent 9,026,815, 2015
1452015
Estimating temperature of a processor core in a low power state without thermal sensor information
AN Ananthakrishnan, E Rotem, I Feit, T Ziv, D Rajwan, N Shulman, ...
US Patent 9,074,947, 2015
1392015
Power management architecture of the 2nd generation intel® core microarchitecture, formerly codenamed sandy bridge
E Rotem, A Naveh, D Rajwan, A Ananthakrishnan, E Weissmann
2011 IEEE Hot Chips 23 Symposium (HCS), 1-33, 2011
1242011
Introduction to Intel Core Duo Processor Architecture.
S Gochman, A Mendelson, A Naveh, E Rotem
Intel Technology Journal 10 (2), 2006
1152006
Method, system, and apparatus for selecting a maximum operation point based on number of active cores and performance level of each of the active cores
E Rotem, O Lamdan, A Naveh
US Patent 7,502,948, 2009
1082009
Temperature measurement in the intel (R) coretm duo processor
E Rotem, J Hermerding, A Cohen, H Cain
arXiv preprint arXiv:0709.1861, 2007
932007
Power management for multiple processor cores
L Finkelstein, E Rotem, A Cohen, R Ronen, D Rajwan
US Patent 8,402,290, 2013
752013
Controlling operation of a voltage supply according to the activity of a multi-core integrated circuit component or of multiple IC components
E Rotem
US Patent App. 10/442,595, 2005
682005
Device and method for on-die temperature measurement
E Rotem, JG Hermerding, E Distefano, B Cooper
US Patent 7,878,016, 2011
632011
Analysis of thermal monitor features of the intel pentium m processor
E Rotem, A Naveh, M Moffie, A Mendelson
TACS Workshop at ISCA-31, 2004
632004
The system can't perform the operation now. Try again later.
Articles 1–20