| Design and optimization of 4-bit array multiplier with adiabatic logic using 65 nm CMOS technologies D Sharma, A Rai, S Debbarma, O Prakash, MK Ojha, V Nath IETE Journal of Research, 1-14, 2023 | 6 | 2023 |
| Design of low power and secure implementation of sbox for aes H Prasad, J Kandpal, D Sharma, G Verma 2016 3rd International Conference on Computing for Sustainable Global …, 2016 | 5 | 2016 |
| Design goal based implementation of energy efficient Greek unicode reader for natural language processing G Verma, V Verma, D Sharma, A Kumar, H Verma, K Kalia International Journal of Smart Home 10 (3), 181-190, 2016 | 3 | 2016 |
| Analysis of Programmable Gain Instrumentation Amplifier D Sharma, N Shylashree, R Prasad, V Nath International Journal of Microsystems and Iot 1 (1), 41–47, 2023 | 1 | 2023 |
| Design of Low Power and Secure Implementation of SBox and Inverse-SBox for AES D Sharma, A Bhardwaj, H Prasad, J Kandpal, A Saxena, KS Kant, ... International Journal of Security and Its Applications 10 (7), 11-24, 2016 | 1 | 2016 |
| Design of Unmanned All-Terrain Spy Bot A Kumar, Aradhana, S Kumari, Shipra, D Prasad, D Sharma, ... Microelectronics, Communication Systems, Machine Learning and Internet of …, 2022 | | 2022 |
Dr. Vijay NathBirla Institute of Technology, MesraVerified email at bitmesra.ac.in
