| Error correction coding techniques for non-volatile memory A Berman, A Lavan US Patent App. 12/068,787, 2008 | 69 | 2008 |
| Constrained flash memory programming A Berman, Y Birk 2011 IEEE International Symposium on Information Theory Proceedings, 2128-2132, 2011 | 61 | 2011 |
| Compression for fixed-width memories O Rottenstreich, A Berman, Y Cassuto, I Keslassy 2013 IEEE International Symposium on Information Theory, 2379-2383, 2013 | 15 | 2013 |
| Repairing Reed–Solomon Codes Evaluated on Subspaces A Berman, S Buzaglo, A Dor, Y Shany, I Tamo IEEE Transactions on Information Theory 68 (10), 6505-6515, 2022 | 13 | 2022 |
| Repairing Reed–Solomon Codes Evaluated on Subspaces A Berman, S Buzaglo, A Dor, Y Shany, I Tamo 2021 IEEE International Symposium on Information Theory Proceedings, 2021 | 13 | 2021 |
| Method of operating memory device using a compressed party difference, memory device using the same and memory system including the device A Berman, U Beitler, JJ Kong US Patent 10,372,534, 2019 | 13 | 2019 |
| Mitigating inter-cell coupling effects in non volatile memory (NVM) cells Y Birk, A Berman US Patent 9,229,804, 2016 | 13 | 2016 |
| Threshold estimation in NAND flash devices E Halperin, E Blaichman, A Berman US Patent 10,861,561, 2020 | 12 | 2020 |
| Retired page utilization (RPU) for improved write capacity of solid state drives Y Birk, A Berman US Patent 10,521,339, 2019 | 11 | 2019 |
| Minimal maximum-level programming Y Birk, A Berman US Patent 9,607,696, 2017 | 11 | 2017 |
| A 4b/Cell 8Gb NROM data-storage memory with enhanced write performance R Sahar, A Lavan, E Geyari, A Berman, I Cohen, O Tirosh, K Danon, ... 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 11 | 2008 |
| Integrating de-duplication and write for increased performance and endurance of solid-state drives A Berman, Y Birk 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel …, 2010 | 10 | 2010 |
| Retired-page utilization in write-once memory—A coding perspective A Berman, Y Birk 2013 IEEE International Symposium on Information Theory, 1062-1066, 2013 | 9 | 2013 |
| Low-complexity two-dimensional data encoding for memory inter-cell interference reduction A Berman, Y Birk 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, 1-5, 2012 | 9 | 2012 |
| Error correction scheme for constrained inter-cell interference in flash memory A Berman, Y Birk 2011 Annual Non-Volatile Memory Workshop (NVMW), 2011 | 8 | 2011 |
| Mitigating inter-cell coupling effects in MLC NAND flash via constrained coding A Berman, Y Birk Proc. Flash Memory Summit, 2010 | 8 | 2010 |
| Low-overhead error detection for Networks-on-Chip A Berman, I Keidar 2009 IEEE International Conference on Computer Design, 219-224, 2009 | 6 | 2009 |
| Error detection and correction using machine learning Berman, B Amit, G Evgeny, G Ron, Sergey US Patent 11,205,498, 2021 | 5 | 2021 |
| Memory system with MLC memory cells and partial page compression or reduction A Berman, JJ Kong, U Beitler US Patent 9,858,994, 2018 | 5 | 2018 |
| Machine-Learning Error-Correcting Code Controller A Doubchak, D Shapiro, E Blaichman, L Cohen, A Berman US Patent 11,742,879, 2022 | 4 | 2022 |
Ori RottenstreichTechnionVerified email at cs.technion.ac.il
