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Mohamed M. Elsayed
Mohamed M. Elsayed
Texas A&M, Silicon Labs
Verified email at silabs.com
Title
Cited by
Cited by
Year
A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element
V Dhanasekaran, M Gambhir, MM Elsayed, E Sánchez-Sinencio, ...
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
1322009
A Continuous Time Multi-BitADC Using Time Domain Quantizer and Feedback Element
V Dhanasekaran, M Gambhir, MM Elsayed, E Sanchez-Sinencio, ...
IEEE Journal of Solid-State Circuits 46 (3), 639-650, 2011
732011
A low THD, low power, high output-swing time-mode-based tunable oscillator via digital harmonic-cancellation technique
MM Elsayed, E Sanchez-Sinencio
IEEE Journal of Solid-State Circuits 45 (5), 1061-1071, 2010
722010
A spur-frequency-boosting PLL with a− 74 dBc reference-spur suppression in 90 nm digital CMOS
MM Elsayed, M Abdul-Latif, E Sanchez-Sinencio
IEEE Journal of Solid-State Circuits 48 (9), 2104-2117, 2013
462013
A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Modulator
MM Elsayed, V Dhanasekaran, M Gambhir, J Silva-Martinez, ...
IEEE Journal of Solid-State Circuits 46 (9), 2084-2098, 2011
372011
A Wideband Millimeter-Wave Frequency Synthesis Architecture Using Multi-Order Harmonic-Synthesis and Variable-Push Frequency Multiplication
MM Abdul-Latif, MM Elsayed, E Sanchez-Sinencio
IEEE journal of solid-state circuits 46 (6), 1265-1283, 2011
322011
Method and apparatus for calibration of successive approximation register analog-to-digital converters
Y Zhou, C Daigle, S Yan, M Elsayed
US Patent 9,041,569, 2015
252015
High speed low current voltage comparator
NM Atkinson, P Kallam, MM Elsayed
US Patent 9,866,215, 2018
152018
System and method for correcting offset voltage errors within a band gap circuit
M Elsayed, SD Willingham
US Patent 10,310,528, 2019
112019
New applications and technology scaling driving next generation A/D converters
H Zhang, MM Elsayed, E Sanchez-Sinencio
2009 European Conference on Circuit Theory and Design, 109-112, 2009
92009
A Spur-Frequency-Boosting PLL with a− 74dBc reference-spur rejection in 90nm digital CMOS
M Elsayed, M Abdul-Latif, E Sánchez-Sinencio
2011 IEEE Radio Frequency Integrated Circuits Symposium, 1-4, 2011
62011
Slew-rate controlled supply voltage switching
MM Elsayed, KW Fernald, M Powell
US Patent 10,468,983, 2019
52019
Bias Current Generator
MM Elsayed, MM Elkholy
US Patent App. 15/609,644, 2018
52018
Clocked reference buffer in a successive approximation analog-to-digital converter
M Elsayed, X Wang, S Yan
US Patent 8,922,418, 2014
52014
Pixel ramp generator for image sensor
M Elsayed, M Powell, X Wang
US Patent 11,303,293, 2022
32022
Apparatus for sensing temperature in electronic circuitry and associated methods
MM Elsayed, KW Fernald
US Patent 10,788,376, 2020
32020
Current steering architecture with high supply noise rejection
M Elsayed
US Patent 11,363,228, 2022
12022
Reduced-leakage apparatus for sampling electrical signals and associated methods
MM Elsayed
US Patent 11,264,111, 2022
12022
Loadable true-single-phase-clocking flop
M Elsayed
US Patent 11,095,275, 2021
12021
Apparatus with electronic circuitry having reduced leakage current and associated methods
MM Elsayed
US Patent 10,659,045, 2020
12020
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