Leland Chang
Leland Chang
Verified email at us.ibm.com
Title
Cited by
Cited by
Year
Sub 50-nm finfet: Pmos
X Huang, WC Lee, C Kuo, D Hisamoto, L Chang, J Kedzierski, ...
International Electron Devices Meeting 1999. Technical Digest (Cat. No …, 1999
7661999
Stable SRAM cell design for the 32 nm node and beyond
L Chang, DM Fried, J Hergenrother, JW Sleight, RH Dennard, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 128-129, 2005
7442005
FinFET scaling to 10 nm gate length
B Yu, L Chang, S Ahmed, H Wang, S Bell, CY Yang, C Tabery, C Ho, ...
Digest. International Electron Devices Meeting,, 251-254, 2002
7062002
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
C Hu, TJ King, V Subramanian, L Chang, X Huang, YK Choi, ...
US Patent 6,413,802, 2002
6632002
Sub-50 nm P-channel FinFET
X Huang, WC Lee, C Kuo, D Hisamoto, L Chang, J Kedzierski, ...
IEEE Transactions on Electron Devices 48 (5), 880-886, 2001
5532001
An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches
L Chang, RK Montoye, Y Nakamura, KA Batson, RJ Eickemeyer, ...
IEEE Journal of Solid-State Circuits 43 (4), 956-963, 2008
4242008
Extremely scaled silicon nano-CMOS devices
L Chang, Y Choi, D Ha, P Ranade, S Xiong, J Bokor, C Hu, TJ King
Proceedings of the IEEE 91 (11), 1860-1873, 2003
3242003
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
J Seo, B Brezzo, Y Liu, BD Parker, SK Esser, RK Montoye, B Rajendran, ...
2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2011
3192011
Ultralow-voltage, minimum-energy CMOS
S Hanson, B Zhai, K Bernstein, D Blaauw, A Bryant, L Chang, KK Das, ...
IBM journal of research and development 50 (4.5), 469-490, 2006
2782006
Content addressable memory array programmed to perform logic operations
L Chang, GS Ditlow, BL Ji, RK Montoye
US Patent 8,059,438, 2011
2382011
Integrated circuit having gates and active regions forming a regular grating
L Chang, HSP Wong, IBM Corporation, I Tuchman, M Ryan, LLP Lewis, ...
US Patent 7,402,848, 2008
2282008
Integrated circuit having gates and active regions forming a regular grating
L Chang, HSP Wong, IBM Corporation, I Tuchman, M Ryan, LLP Lewis, ...
US Patent 7,465,973, 2008
2242008
Sub-60-nm quasi-planar FinFETs fabricated using a simplified process
N Lindert, L Chang, YK Choi, EH Anderson, WC Lee, TJ King, J Bokor, ...
IEEE Electron Device Letters 22 (10), 487-489, 2001
2092001
Practical strategies for power-efficient computing technologies
L Chang, DJ Frank, RK Montoye, SJ Koester, BL Ji, PW Coteus, ...
Proceedings of the IEEE 98 (2), 215-236, 2010
2042010
CMOS circuit performance enhancement by surface orientation optimization
L Chang, M Ieong, M Yang
IEEE Transactions on Electron Devices 51 (10), 1621-1627, 2004
2012004
Gate length scaling and threshold voltage control of double-gate MOSFETs
L Chang, S Tang, TJ King, J Bokor, C Hu
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000
1982000
A 5.3 GHz 8T-SRAM with operation down to 0.41 V in 65nm CMOS
L Chang, Y Nakamura, RK Montoye, J Sawada, AK Martin, K Kinoshita, ...
2007 IEEE Symposium on VLSI Circuits, 252-253, 2007
1852007
A fully-integrated switched-capacitor 2∶1 voltage converter with regulation capability and 90% efficiency at 2.3A/mm2
L Chang, RK Montoye, BL Ji, AJ Weger, KG Stawiasz, RH Dennard
2010 Symposium on VLSI Circuits, 55-56, 2010
1842010
FinFET process refinements for improved mobility and gate work function engineering
YK Choi, L Chang, P Ranade, JS Lee, D Ha, S Balasubramanian, ...
Digest. International Electron Devices Meeting,, 259-262, 2002
1822002
FinFET-a quasi-planar double-gate MOSFET
SH Tang, L Chang, N Lindert, YK Choi, WC Lee, X Huang, ...
2001 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2001
1812001
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