| Design-space exploration with multi-objective resource-aware modulo scheduling J Oppermann, P Sittel, M Kumm, M Reuter-Oppermann, A Koch, O Sinnen Euro-Par 2019: Parallel Processing: 25th International Conference on …, 2019 | 15 | 2019 |
| ILP-based modulo scheduling and binding for register minimization P Sittel, M Kumm, J Oppermann, K Möller, P Zipf, A Koch 2018 28th international conference on field programmable logic and …, 2018 | 15 | 2018 |
| HatScheT: A contribution to agile HLS P Sittel, J Oppermann, M Kumm, A Koch, P Zipf FSP Workshop 2018; Fifth International Workshop on FPGAs for Software …, 2018 | 10 | 2018 |
| ScaLP: A Light-Weighted (MI)LP-Library P Sittel, T Schönwälder, M Kumm, P Zipf Workshop Methoden und Beschreibungssprachen zur Modellierung und …, 2018 | 10 | 2018 |
| Optimal and Heuristic Approaches to Modulo Scheduling With Rational Initiation Intervals in Hardware Synthesis P Sittel, N Fiege, J Wickerson, P Zipf IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 5 | 2021 |
| Isomorphic subgraph-based problem reduction for resource minimal modulo scheduling P Sittel, N Fiege, M Kumm, P Zipf 2019 international conference on reconfigurable computing and FPGAs …, 2019 | 5 | 2019 |
| High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits. P Sittel, M Kumm, K Möller, M Hardieck, P Zipf MBMV, 103-114, 2017 | 5 | 2017 |
| Constant matrix multiplication with ternary adders M Hardieck, M Kumm, P Sittel, P Zipf 2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018 | 4 | 2018 |
| Modulo scheduling with rational initiation intervals in custom hardware design P Sittel, J Wickerson, M Kuimm, P Zipf 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 568-573, 2020 | 3 | 2020 |
| Model-based hardware design based on compatible sets of isomorphic subgraphs P Sittel, K Möller, M Kumm, P Zipf, B Pasca, M Jervis 2017 International Conference on Field Programmable Technology (ICFPT), 199-202, 2017 | 3 | 2017 |
| Optimal binding and port assignment for loop pipelining in high-level synthesis N Fiege, P Sittel, P Zipf 2022 32nd International Conference on Field-Programmable Logic and …, 2022 | 1 | 2022 |
| Speeding up optimal modulo scheduling with rational initiation intervals N Fiege, P Sittel, P Zipf 2022 32nd International Conference on Field-Programmable Logic and …, 2022 | 1 | 2022 |
| Improving Energy Efficiency in Loop Pipelining by Rational-II Modulo Scheduling N Fiege, P Sittel, P Zipf 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom …, 2022 | | 2022 |
Martin KummFulda University of Applied Sciencescs.hs-fulda.de üzerinde doğrulanmış e-posta adresine sahip
