| Compression of deep convolutional neural networks for fast and low power mobile applications YD Kim, E Park, S Yoo, T Choi, L Yang, D Shin arXiv preprint arXiv:1511.06530, 2015 | 581 | 2015 |
| A scalable processing-in-memory accelerator for parallel graph processing J Ahn, S Hong, S Yoo, O Mutlu, K Choi Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 551 | 2015 |
| PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture J Ahn, S Yoo, O Mutlu, K Choi 2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture …, 2015 | 340 | 2015 |
| Component-based design approach for multicore SoCs W Cesario, A Baghdadi, L Gauthier, D Lyonnard, G Nicolescu, Y Paviot, ... Proceedings of the 39th annual Design Automation Conference, 789-794, 2002 | 242 | 2002 |
| Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip D Lyonnard, S Yoo, A Baghdadi, AA Jerraya Proceedings of the 38th annual Design Automation Conference, 518-523, 2001 | 210 | 2001 |
| Multiprocessor SoC platforms: a component-based design approach WO Cesário, D Lyonnard, G Nicolescu, Y Paviot, S Yoo, AA Jerraya, ... IEEE Design & Test of Computers 19 (6), 52-63, 2002 | 183 | 2002 |
| Automatic generation and targeting of application-specific operating systems and embedded systems software L Gauthier, S Yoo, AA Jerraya IEEE transactions on computer-aided design of integrated circuits and …, 2001 | 157 | 2001 |
| Weighted-entropy-based quantization for deep neural networks E Park, J Ahn, S Yoo Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2017 | 136 | 2017 |
| Machine learning at facebook: Understanding inference at the edge CJ Wu, D Brooks, K Chen, D Chen, S Choudhury, M Dukhan, ... 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 132 | 2019 |
| Dual motion estimation for frame rate up-conversion SJ Kang, S Yoo, YH Kim IEEE Transactions on Circuits and Systems for Video Technology 20 (12), 1909 …, 2010 | 115 | 2010 |
| Method and apparatus for correcting errors in memory device SJ Yoo, N Kang, CI Park, HJ Choi US Patent 8,615,702, 2013 | 114 | 2013 |
| Power management of hybrid DRAM/PRAM-based main memory H Park, S Yoo, S Lee 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC), 59-64, 2011 | 101 | 2011 |
| PowerViP: Soc power estimation framework at transaction level I Lee, H Kim, P Yang, S Yoo, EY Chung, KM Choi, JT Kong, SK Eo Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 96 | 2006 |
| Automatic generation of fast timed simulation models for operating systems in SoC design S Yoo, G Nicolescu, L Gauthier, AA Jerraya Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 95 | 2002 |
| DASCA: Dead write prediction assisted STT-RAM cache architecture J Ahn, S Yoo, K Choi 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 91 | 2014 |
| Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures P Gerin, S Yoo, G Nicolescu, AA Jerraya Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 87 | 2001 |
| Energy-efficient neural network accelerator based on outlier-aware low-precision computation E Park, D Kim, S Yoo 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 80 | 2018 |
| Introduction to hardware abstraction layers for SoC S Yoo, AA Jerraya Embedded Software for SoC, 179-186, 2003 | 72 | 2003 |
| A generic wrapper architecture for multi-processor SoC cosimulation and design S Yoo, G Nicolescu, D Lyonnard, A Baghdadi, AA Jerraya Proceedings of the ninth international symposium on Hardware/software …, 2001 | 71 | 2001 |
| Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model A Bouchhima, S Yoo, A Jerraya ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004 | 68 | 2004 |
