A Tunable Active Filter in CMOS for RF Applications H Cetinkaya, N Tarim The 15th IEEE International Conference on Electronics, Circuits and Systems …, 2008 | 7 | 2008 |
A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs H Cetinkaya, A Zeki, A Girgin, D Karabeyoglu, TC Karalar The 25th IEEE International Conference Electronics, Circuits and Systems …, 2018 | 6 | 2018 |
Composite Resistor Technique for Process and Temperature Compensations of Low Power Ring Oscillators H Cetinkaya, A Zeki, A Girgin, TC Karalar The 10th IEEE Latin American Symposium on Circuits and Systems, 29-32, 2019 | 3 | 2019 |
A 1.5-b front-end sub-adc with symmetrical cross coupled bootstrap and adaptive power/ground switches for gs/s sampling rate sha-less pipeline adcs H Çetinkaya, TC Karalar 2019 11th International Conference on Electrical and Electronics Engineering …, 2019 | 1 | 2019 |
A Concurrent Multiband Fully Differential CMOS LNA with a Local Active Feedback for Cellular Applications 3G-4G H Cetinkaya, TC Karalar, BS Yarman The 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 1 | 2017 |
Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm H Çetinkaya, A Girgin, TC Karalar Microelectronics Journal 139, 2023 | | 2023 |
A Low Noise TIA with T-network Feedback Using High Value Gate Controlled PMOS Resistors H Çetinkaya, Y Talay The 30th IEEE International Conference on Electronics, Circuits and Systems …, 2023 | | 2023 |
A 5th-Order 900 MHz Active Chebyshev Filter in CMOS H Çetinkaya, N Tarım The IEEJ International Analog VLSI Workshop, 50-55, 2008 | | 2008 |