Young-Joon Lee
Young-Joon Lee
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Başlık
Alıntı yapanlar
Alıntı yapanlar
Yıl
3D-MAPS: 3D Massively Parallel Processor with Stacked Memory
DH Kim, K Athikulwongse, MB Healy, MM Hossain, M Jung, I Khorosh, ...
IEEE International Solid-State Circuits Conference, 188-190, 2012
2042012
Thermal Characterization of Interlayer Microfluidic Cooling of Three-Dimensional IC with Non-Uniform Heat Flux
YJ Kim, YK Joshi, AG Fedorov, YJ Lee, SK Lim
ASME International Conference on Nanochannels, Microchannels and …, 2009
145*2009
TSV Stress Aware Timing Analysis with Applications to 3D-IC Layout Optimization
JS Yang, K Athikulwongse, YJ Lee, SK Lim, DZ Pan
ACM Design Automation Conference, 803-806, 2010
1382010
Thermal Characterization of Interlayer Microfluidic Cooling of Three-Dimensional Integrated Circuits With Nonuniform Heat Flux
YJ Kim, YK Joshi, AG Fedorov, YJ Lee, SK Lim
ASME Journal of Heat Transfer 132 (4), 2010
1292010
Design and Analysis of 3D-MAPS: A Many-Core 3D Processor with Stacked Memory
MB Healy, K Athikulwongse, R Goel, MM Hossain, DH Kim, YJ Lee, ...
IEEE Custom Integrated Circuits Conference, 2010
932010
Through Silicon Via Management during 3D Physical Design: When to Add and How Many?
M Pathak, YJ Lee, T Moon, SK Lim
IEEE International Conference on Computer-Aided Design, 387-394, 2010
842010
Power Benefit Study for Ultra-High Density Transistor-Level Monolithic 3D ICs
YJ Lee, D Limbrick, SK Lim
ACM Design Automation Conference, 2013
682013
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)
DH Kim, K Athikulwongse, MB Healy, MM Hossain, M Jung, I Khorosh, ...
IEEE Transactions on Computers, 2013
622013
Ultra High Density Logic Designs Using Transistor-Level Monolithic 3D Integration
YJ Lee, P Morrow, SK Lim
IEEE International Conference on Computer-Aided Design, 2012
492012
Multi-functional Interconnect Co-optimization for Fast and Reliable 3D Stacked ICs
YJ Lee, R Goel, SK Lim
IEEE/ACM International Conference on Computer-Aided Design, 645-651, 2009
462009
Co-Design of Signal, Power, and Thermal Distribution Networks for 3D ICs
YJ Lee, YJ Kim, G Huang, M Bakir, Y Joshi, A Fedorov, SK Lim
Design, Automation & Test in Europe Conference & Exhibition, 610-615, 2009
452009
Ultra High Density Logic Designs using Monolithic 3D Integration
YJ Lee, SK Lim
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
412013
Chip Placement with Deep Reinforcement Learning
A Mirhoseini, A Goldie, M Yazgan, J Jiang, E Songhori, S Wang, YJ Lee, ...
arXiv preprint arXiv:2004.10746, 2020
342020
OpenMP-Based Parallel Implementation of a Continuous Speech Recognizer on a Multi-Core System
K You, Y Lee, W Sung
IEEE International Conference on Acoustics, Speech and Signal Processing …, 2009
332009
Co-Optimization of Signal, Power, and Thermal Distribution Networks for 3D ICs
YJ Lee, SK Lim
IEEE Symposium on Electrical Design of Advanced Packaging and Systems …, 2008
332008
Timing Analysis and Optimization for 3D Stacked Multi-Core Microprocessors
YJ Lee, SK Lim
IEEE International 3D System Integration Conference, 2010
282010
Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3D ICs
YJ Lee, SK Lim
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
272011
How to Reduce Power in 3D IC Designs: A Case Study with OpenSPARC T2 Core
M Jung, T Song, Y Wan, YJ Lee, D Mohapatra, H Wang, G Taylor, ...
IEEE Custom Integrated Circuits Conference, 2013
242013
Routing Optimization of Multi-modal Interconnects In 3D ICs
YJ Lee, SK Lim
Electronic Components and Technology Conference, 32-39, 2009
212009
Slew-Aware Buffer Insertion for Through-Silicon-Via-Based 3D ICs
YJ Lee, I Hong, SK Lim
IEEE Custom Integrated Circuits Conference, 2012
172012
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Makaleler 1–20