Takip et
Najwa Aaraj
Najwa Aaraj
Technology Innovation Institute, Princeton University
tii.ae üzerinde doğrulanmış e-posta adresine sahip
Başlık
Alıntı yapanlar
Alıntı yapanlar
Yıl
Optimizing performance of integrity monitoring
DLS Najwa Aaraj, Mihai Christodorescu, Dimitrios Pendarakis, Reiner Sailer
US Patent US8949797B2, 2015
99*2015
Analysis and design of a hardware/software trusted platform module for embedded systems
N Aaraj, A Raghunathan, NK Jha
ACM Transactions on Embedded Computing Systems (TECS) 8 (1), 1-31, 2009
722009
Survey on fully homomorphic encryption, theory, and applications
C Marcolla, V Sucasas, M Manzano, R Bassoli, FHP Fitzek, N Aaraj
Proceedings of the IEEE 110 (10), 1572-1609, 2022
692022
Energy and execution time analysis of a software-based trusted platform module
N Aaraj, A Raghunathan, S Ravi, NK Jha
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
412007
SHARKS: Smart hacking approaches for risk scanning in Internet-of-Things and cyber-physical systems based on machine learning
T Saha, N Aaraj, N Ajjarapu, NK Jha
IEEE Transactions on Emerging Topics in Computing 10 (2), 870-885, 2021
352021
Dynamic binary instrumentation-based framework for malware defense
N Aaraj, A Raghunathan, NK Jha
Detection of Intrusions and Malware, and Vulnerability Assessment: 5th …, 2008
322008
Machine learning assisted security analysis of 5G-network-connected systems
T Saha, N Aaraj, NK Jha
IEEE Transactions on Emerging Topics in Computing 10 (4), 2006-2024, 2022
262022
Architectures for efficient face authentication in embedded systems
N Aaraj, S Ravi, S Raghunathan, NK Jha
Proceedings of the Design Automation & Test in Europe Conference 2, 6 pp., 2006
262006
Hardware architectures for post-quantum digital signature schemes
D Soni, K Basu, M Nabeel, N Aaraj, M Manzano, R Karri
Springer, 2021
222021
Hybrid architectures for efficient and secure face authentication in embedded systems
N Aaraj, S Ravi, A Raghunathan, NK Jha
IEEE transactions on very large scale integration (VLSI) systems 15 (3), 296-308, 2007
222007
Finding and evaluating parameters for BGV
J Mono, C Marcolla, G Land, T Güneysu, N Aaraj
International Conference on Cryptology in Africa, 370-394, 2023
142023
System and method for security in internet-of-things and cyber-physical systems based on machine learning
T Saha, N Aaraj, NK Jha
US Patent App. 17/603,453, 2022
142022
Falcon
D Soni, K Basu, M Nabeel, N Aaraj, M Manzano, R Karri, D Soni, K Basu, ...
Hardware Architectures for Post-Quantum Digital Signature Schemes, 31-41, 2021
122021
Secure reconfiguration of software-defined radio
C Li, NK Jha, A Raghunathan
ACM Transactions on Embedded Computing Systems (TECS) 11 (1), 1-22, 2012
102012
Transient current testing of dynamic CMOS circuits
N Aaraj, A Nazer, A Chehab, A Kayssi
19th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2004
102004
Modular inverse for integers using fast constant time GCD algorithm and its applications
S Deshpande, SM Del Pozo, V Mateu, M Manzano, N Aaraj, J Szefer
2021 31st International Conference on Field-Programmable Logic and …, 2021
92021
A framework for defending embedded systems against software attacks
N Aaraj, A Raghunathan, NK Jha
ACM Transactions on Embedded Computing Systems (TECS) 10 (3), 1-23, 2011
62011
Detection of Intrusions and Malware, and Vulnerability Assessment
D Zamboni, D Zamboni
Springer, 2008
62008
CRYSTALS-dilithium
D Soni, K Basu, M Nabeel, N Aaraj, M Manzano, R Karri, D Soni, K Basu, ...
Hardware Architectures for Post-Quantum Digital Signature Schemes, 13-30, 2021
52021
Transient current testing of dynamic CMOS circuits in the presence of leakage and process variation
A Chehab, A Kayssi, A Nazer, N Aaraj
Proceedings. The 16th International Conference on Microelectronics, 2004 …, 2004
52004
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Makaleler 1–20