Shubham Jain
Shubham Jain
Research Staff Member, IBM T.J. Watson Research Center
Verified email at ibm.com
Title
Cited by
Cited by
Year
Computing in Memory with Spin-Transfer Torque Magnetic RAM
S Jain, A Ranjan, K Roy, A Raghunathan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (3), 470-483, 2018
782018
Computing in memory with spin-transfer torque magnetic RAM
S Jain, A Ranjan, K Roy, A Raghunathan
arXiv preprint arXiv:1703.02118, 2017
782017
RxNN: A Framework for Evaluating Deep Neural Networks on Resistive Crossbars
S Jain, A Sengupta, K Roy, A Raghunathan
arXiv preprint arXiv:1809.00072, 2018
172018
RxNN: A Framework for Evaluating Deep Neural Networks on Resistive Crossbars
S Jain, A Sengupta, K Roy, A Raghunathan
arXiv preprint arXiv:1809.00072, 2018
172018
Compensated-DNN: Energy efficient low-precision deep neural networks by compensating quantization errors
S Jain, S Venkataramani, V Srinivasan, J Choi, P Chuang, L Chang
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
162018
Approximation through logic isolation for the design of quality configurable circuits
S Jain, S Venkataramani, A Raghunathan
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 612-617, 2016
122016
SparCE: Sparsity Aware General-Purpose Core Extensions to Accelerate Deep Neural Networks
S Sen, S Jain, S Venkataramani, A Raghunathan
IEEE Transactions on Computers 68 (6), 912-925, 2018
82018
Neural network accelerator design with resistive crossbars: Opportunities and challenges
S Jain, A Ankit, I Chakraborty, T Gokmen, M Rasch, W Haensch, K Roy, ...
IBM Journal of Research and Development 63 (6), 10: 1-10: 13, 2019
32019
X-MANN: A crossbar based architecture for memory augmented neural networks
A Ranjan, S Jain, JR Stevens, D Das, B Kaul, A Raghunathan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
32019
System and method for in-memory computing
S Jain, A Ranjan, K Roy, A Raghunathan
US Patent 10,073,733, 2018
32018
CxDNN: Hardware-software Compensation Methods for Deep Neural Networks on Resistive Crossbar Systems
S Jain, A Raghunathan
ACM Transactions on Embedded Computing Systems (TECS) 18 (6), 1-23, 2019
22019
Non-Volatile Memory utilizing Reconfigurable Ferroelectric Transistors to enable Differential Read and Energy-Efficient In-Memory Computation
SK Thirumala, S Jain, A Raghunathan, SK Gupta
2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019
22019
BiScaled-DNN: Quantizing long-tailed datastructures with two scale factors for deep neural networks
S Jain, S Venkataramani, V Srinivasan, J Choi, K Gopalakrishnan, ...
2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019
22019
Computing-in-Memory with Spintronics
S Jain, S Sapatnekar, JP Wang, K Roy, A Raghunathan
22018
TxSim: Modeling Training of Deep Neural Networks on Resistive Crossbar Systems
S Roy, S Sridharan, S Jain, A Raghunathan
arXiv preprint arXiv:2002.11151, 2020
2020
Low precision deep neural network enabled by compensation instructions
S Venkataramani, S Jain, V Srinivasan, C Jungwook, L Chang
US Patent App. 16/020,952, 2020
2020
Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support
S Thirumala, YT Hung, S Jain, A Raha, N Thakuria, V Raghunathan, ...
arXiv preprint arXiv:1912.07821, 2019
2019
IN-MEMORY COMPUTING WITH CMOS AND EMERGING MEMORY TECHNOLOGIES
S Jain
Purdue University Graduate School, 2019
2019
TiM-DNN: Ternary in Memory accelerator for Deep Neural Networks
S Jain, SK Gupta, A Raghunathan
arXiv preprint arXiv:1909.06892, 2019
2019
Automatic Synthesis Techniques for Approximate Circuits
A Ranjan, S Venkataramani, S Jain, Y Kim, SG Ramasubramanian, ...
Approximate Circuits, 123-140, 2019
2019
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Articles 1–20