| A 10-b 800-MS/s time-interleaved SAR ADC with fast variance-based timing-skew calibration J Song, K Ragab, X Tang, N Sun IEEE Journal of Solid-State Circuits 52 (10), 2563-2575, 2017 | 60* | 2017 |
| A 10-b 2b/cycle 300MS/s SAR ADC with a single differential DAC in 40nm CMOS J Song, X Tang, N Sun 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 37 | 2017 |
| A 0.95-mW 6-b 700-MS/s single-channel loop-unrolled SAR ADC in 40-nm CMOS L Chen, K Ragab, X Tang, J Song, A Sanyal, N Sun IEEE Transactions on Circuits and Systems II: Express Briefs 64 (3), 244-248, 2016 | 33 | 2016 |
| A 10-b 750µW 200MS/s fully dynamic single-channel SAR ADC in 40nm CMOS X Tang, L Chen, J Song, N Sun ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 413-416, 2016 | 28 | 2016 |
| A 10-b 600-MS/s 2-way time-interleaved SAR ADC with mean absolute deviation-based background timing-skew calibration J Song, K Ragab, X Tang, N Sun IEEE Transactions on Circuits and Systems I: Regular Papers 66 (8), 2876-2887, 2019 | 26 | 2019 |
| A 1.5 fJ/conv-step 10b 100kS/s SAR ADC with gain-boosted dynamic comparator X Tang, L Chen, J Song, N Sun 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 229-232, 2017 | 11 | 2017 |
