Dan Lenoski
Dan Lenoski
VP Engineering, Barefoot Networks
Verified email at barefootnetworks.com
Title
Cited by
Cited by
Year
Memory consistency and event ordering in scalable shared-memory multiprocessors
K Gharachorloo, D Lenoski, J Laudon, P Gibbons, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 15-26, 1990
16671990
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
13791992
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
13791992
The SGI Origin: a ccNUMA highly scalable server
J Laudon, D Lenoski
ACM SIGARCH Computer Architecture News 25 (2), 241-251, 1997
11261997
The directory-based cache coherence protocol for the DASH multiprocessor
D Lenoski, J Laudon, K Gharachorloo, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 148-159, 1990
9281990
The DASH prototype: Logic overhead and performance
D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy
IEEE Transactions on parallel and distributed systems 4 (1), 41-61, 1993
2561993
The DASH prototype: Implementation and performance
D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 20 (2), 92-103, 1992
2551992
Scalable shared-memory multiprocessing
DE Lenoski, WD Weber
Elsevier, 2014
1892014
Scalable Shared Memory Multiprocessing
WDW Daniel E. Lenoski
Morgan Kaufmann Publishers, 1995
189*1995
High memory capacity DIMM with data and state memory
JP Laudon, DE Lenoski, J Manton, ME Anderson
US Patent 6,049,476, 2000
1352000
The design and analysis of DASH: A scalable directory-based multiprocessor.
DE Lenoski
821993
High-memory capacity DIMM with data and state memory
JP Laudon, DE Lenoski, J Manton
US Patent 5,790,447, 1998
751998
Method, system and computer program product for managing memory in a non-uniform memory access system
LF Stevens
US Patent 6,289,424, 2001
742001
Measuring memory hierarchy performance of cache-coherent multiprocessors using micro benchmarks
C Hristea, D Lenoski, J Keen
Proceedings of the 1997 ACM/IEEE conference on Supercomputing, 1-12, 1997
691997
Resequencing packets at output ports without errors using packet timestamps and timestamp floors
JS Turner, DE Lenoski
US Patent 6,816,492, 2004
662004
Apparatus and method for page migration in a non-uniform memory access (NUMA) system
JP Laudon, DE Lenoski
US Patent 5,727,150, 1998
621998
Design of scalable shared-memory multiprocessors: The DASH approach
D Lenoski, K Gharachorloo, J Laudon, A Gupta, J Hennessy, M Horowitz, ...
1990 Thirty-Fifth IEEE Computer Society International Conference on …, 1990
561990
Distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching system
DE Lenoski, WN Eatherton, JA Fingerhut, JS Turner
US Patent 6,990,063, 2006
492006
Method and apparatus for accumulating and distributing data items within a packet switching system
DE Lenoski, JS Turner
US Patent 6,735,173, 2004
452004
Dimm pair with data memory and state memory
JP Laudon, DE Lenoski, J Manton
US Patent 5,686,730, 1997
451997
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