| Memristor-based material implication (IMPLY) logic: Design principles and methodologies S Kvatinsky, G Satat, N Wald, EG Friedman, A Kolodny, UC Weiser IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2013 | 342 | 2013 |
| MAGIC—Memristor-aided logic S Kvatinsky, D Belousov, S Liman, G Satat, N Wald, EG Friedman, ... IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 895-899, 2014 | 331 | 2014 |
| MRL—Memristor ratioed logic S Kvatinsky, N Wald, G Satat, A Kolodny, UC Weiser, EG Friedman 2012 13th International Workshop on Cellular Nanoscale Networks and their …, 2012 | 185 | 2012 |
| Memristor for computing: Myth or reality? S Hamdioui, S Kvatinsky, G Cauwenberghs, L Xie, N Wald, S Joshi, ... Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 51 | 2017 |
| Memristive logic: A framework for evaluation and comparison J Reuben, R Ben-Hur, N Wald, N Talati, AH Ali, PE Gaillardon, ... 2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017 | 33 | 2017 |
| SIMPLE MAGIC: Synthesis and in-memory mapping of logic execution for memristor-aided logic RB Hur, N Wald, N Talati, S Kvatinsky 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 225-232, 2017 | 32 | 2017 |
| Efficient algorithms for in-memory fixed point multiplication using magic A Haj-Ali, R Ben-Hur, N Wald, S Kvatinsky 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 25 | 2018 |
| Imaging: In-memory algorithms for image processing A Haj-Ali, R Ben-Hur, N Wald, R Ronen, S Kvatinsky IEEE Transactions on Circuits and Systems I: Regular Papers 65 (12), 4258-4271, 2018 | 18 | 2018 |
| Pure memristive logic gate S Kvatinsky, D Belousov, S Liman, N Wald, G Satat US Patent 9,685,954, 2017 | 13 | 2017 |
| Not in name alone: A memristive memory processing unit for real in-memory processing A Haj-Ali, R Ben-Hur, N Wald, R Ronen, S Kvatinsky IEEE Micro 38 (5), 13-21, 2018 | 12 | 2018 |
| Practical challenges in delivering the promises of real processing-in-memory machines N Talati, AH Ali, RB Hur, N Wald, R Ronen, PE Gaillardon, S Kvatinsky 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 12 | 2018 |
| Design methodology for stateful memristive logic gates N Wald, S Kvatinsky 2016 IEEE International Conference on the Science of Electrical Engineering …, 2016 | 5 | 2016 |
| Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing L Danial, E Pikhay, E Herbelin, N Wainstein, V Gupta, N Wald, Y Roizin, ... Nature Electronics 2 (12), 596-605, 2019 | 4 | 2019 |
| A taxonomy and evaluation framework for memristive logic J Reuben, N Talati, N Wald, R Ben-Hur, AH Ali, PE Gaillardon, ... Handbook of Memristor Networks, 1065-1099, 2019 | 4 | 2019 |
| mmpu—a real processing-in-memory architecture to combat the von neumann bottleneck N Talati, R Ben-Hur, N Wald, A Haj-Ali, J Reuben, S Kvatinsky Applications of Emerging Memory Technology, 191-213, 2020 | 3 | 2020 |
| Logic with unipolar memristors–circuits and design methodology N Wald, E Amrani, A Drori, S Kvatinsky IFIP/IEEE International Conference on Very Large Scale Integration-System on …, 2016 | 2 | 2016 |
| Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic N Wald, S Kvatinsky Microelectronics Journal 86, 22-33, 2019 | 1 | 2019 |
| Pure memristive logic gate S Kvatinsky, D Belousov, S Liman, N Wald, G Satat US Patent 10,284,203, 2019 | | 2019 |
Shahar KvatinskyTechnion - Israel Institute of TechnologyVerified email at ee.technion.ac.il
