| Harmonic rejective passive up converter SV Vora, JD Dunworth US Patent 9,071,197, 2015 | 20 | 2015 |
| Noise power optimization of monolithic CMOS VCOs S Vora, LE Larson 1999 IEEE Radio Frequency Integrated Circuits Symposium (Cat No. 99CH37001 …, 1999 | 13 | 1999 |
| A dual-band high efficiency CMOS transmitter for wireless CDMA applications J Deng, M Chew, S Vora, M Cassia, T Marra, K Sahota, V Aparin 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 25-28, 2007 | 11 | 2007 |
| Wideband CMOS RMS power detection scheme S Vora US Patent 8,212,546, 2012 | 10 | 2012 |
| Suppression of spurious harmonics generated in TX driver amplifiers SV Vora, WFA Lau US Patent 8,976,897, 2015 | 8 | 2015 |
| A highly integrated CMOS zero-IF transmitter for cellular CDMA applications J Zhou, W Sheng, X Zhang, N Kim, J Woolfrey, M Margarit, S Vora, ... 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium-Digest of …, 2005 | 6 | 2005 |
| IEEE Radio Frequency Integrated Circuits Conference (RFIC) Symp S Vora, LE Larson Dig, 1999 | 5 | 1999 |
| Systems and methods to provide upconverting with notch filtering A Mittal, BS Asuri, K Thiagarajan, SV Vora, M Ranjan US Patent 10,348,528, 2019 | 4 | 2019 |
| Wideband CMOS RMS power detection system S Vora US Patent 9,354,260, 2016 | 3 | 2016 |
| Quadrature symmetric clock signal generation JM Goldblatt, SV Vora US Patent App. 13/654,328, 2014 | 3 | 2014 |
| Metod and system for a wideband CMOS RMS power detection scheme S Vora US Patent 9,753,065, 2017 | 1 | 2017 |
| Communication circuit including a transmitter BS Asuri, K Thiagarajan, A Swaminathan, SM Taleie, YW Chang, ... US Patent 10,454,509, 2019 | | 2019 |
| Harmonic rejective passive frequency up converter SV VORA, JD Dunworth | | 2019 |
| Method and system for a wideband CMOS RMS power detection scheme S Vora US Patent 10,139,436, 2018 | | 2018 |
| A high speed integrated voltage controlled oscillator in commercial CMOS technology SV Vora University of California, San Diego, 1998 | | 1998 |
