New heuristic algorithms for energy aware application mapping and routing on mesh-based NoCs S Tosun Journal of Systems Architecture 57 (1), 69-78, 2011 | 88 | 2011 |
Reliability-centric high-level synthesis S Tosun, N Mansouri, E Arvas, M Kandemir, Y Xie Design, Automation and Test in Europe, 1258-1263, 2005 | 85 | 2005 |
An ILP formulation for application mapping onto network-on-chips S Tosun, O Ozturk, M Ozen 2009 International Conference on Application of Information and …, 2009 | 63 | 2009 |
Cluster-based application mapping method for Network-on-Chip S Tosun Advances in Engineering Software 42 (10), 868-874, 2011 | 54 | 2011 |
An ILP formulation for reliability-oriented high-level synthesis S Tosun, O Ozturk, N Mansouri, E Arvas, M Kandemir, Y Xie, WL Hung Sixth international symposium on quality electronic design (isqed'05), 364-369, 2005 | 44 | 2005 |
Application-specific topology generation algorithms for network-on-chip design S Tosun, Y Ar, S Ozdemir IET computers & digital techniques 6 (5), 318-333, 2012 | 38 | 2012 |
Energy-and reliability-aware task scheduling onto heterogeneous MPSoC architectures S Tosun The Journal of Supercomputing 62 (1), 265-289, 2012 | 37 | 2012 |
Reliability-centric hardware/software co-design S Tosun, N Mansouri, E Arvas, M Kandemir, Y Xie, WL Hung Sixth international symposium on quality electronic design (isqed'05), 375-380, 2005 | 34 | 2005 |
Application mapping algorithms for mesh-based network-on-chip architectures S Tosun, O Ozturk, E Ozkan, M Ozen The Journal of Supercomputing 71 (3), 995-1017, 2015 | 26 | 2015 |
Fault-tolerant topology generation method for application-specific network-on-chips S Tosun, VB Ajabshir, O Mercanoglu, O Ozturk IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 23 | 2015 |
Multi-level on-chip memory hierarchy design for embedded chip multiprocessors O Ozturk, M Kandemir, MJ Irwin, S Tosun 12th International Conference on Parallel and Distributed Systems-(ICPADS'06 …, 2006 | 23 | 2006 |
TopGen: A new algorithm for automatic topology generation for Network on Chip architectures to reduce power consumption Y Ar, S Tosun, H Kaplan 2009 International Conference on Application of Information and …, 2009 | 18 | 2009 |
Evolutionary task allocation in Internet of Things-based application domains EA Khalil, S Ozdemir, S Tosun Future Generation Computer Systems 86, 121-133, 2018 | 17 | 2018 |
An ILP based approach to address code generation for digital signal processors O Ozturk, M Kandemir, S Tosun Proceedings of the 16th ACM Great Lakes symposium on VLSI, 37-42, 2006 | 15 | 2006 |
Reducing memory requirements through task recomputation in embedded multi-CPU systems H Koc, S Tosun, O Ozturk, M Kandemir IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006 | 14 | 2006 |
An ILP formulation for task scheduling on heterogeneous chip multiprocessors S Tosun, N Mansouri, M Kandemir, O Ozturk International Symposium on Computer and Information Sciences, 267-276, 2006 | 13 | 2006 |
Fault-tolerant irregular topology design method for network-on-chips S Tosun, VB Ajabshir, O Mercanoglu, O Ozturk 2014 17th Euromicro Conference on Digital System Design, 631-634, 2014 | 11 | 2014 |
Taking advantage of heterogeneous platforms in image and video processing SA Mahmoudi, E Ozkan, P Manneback, S Tosun, E Jeannot, J Zilinskas High-Performance Computing on Complex Environments 96, 429, 2014 | 10 | 2014 |
Moving object detection by a mounted moving camera OM Sincan, VB Ajabshir, HY Keles, S Tosun IEEE EUROCON 2015-International Conference on Computer as a Tool (EUROCON), 1-6, 2015 | 9 | 2015 |
Genetic algorithm based NoC design with voltage/frequency islands M Ozen, S Tosun 2011 5th International Conference on Application of Information and …, 2011 | 9 | 2011 |