Xing Hu
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Radar: a 3d-reram based dna alignment accelerator architecture
W Huangfu, S Li, X Hu, Y Xie
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
Fpsa: A full system stack solution for reconfigurable reram-based nn accelerator architecture
Y Ji, Y Zhang, X Xie, S Li, P Wang, X Hu, Y Zhang, Y Xie
Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019
Deepsniffer: A dnn model extraction framework based on learning architectural hints
X Hu, L Liang, S Li, L Deng, P Zuo, Y Ji, X Xie, Y Ding, C Liu, T Sherwood, ...
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
Analysis and optimization of the memory hierarchy for graph processing workloads
A Basak, S Li, X Hu, SM Oh, X Xie, L Zhao, X Jiang, Y Xie
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
Memory trojan attack on neural network accelerators
Y Zhao, X Hu, S Li, J Ye, L Deng, Y Ji, J Xu, D Wu, Y Xie
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
Scope: A stochastic computing engine for dram-based in-situ accelerator
S Li, AO Glova, X Hu, P Gu, D Niu, KT Malladi, H Zheng, B Brennan, Y Xie
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
Dynamic sparse graph for efficient deep learning
L Liu, L Deng, X Hu, M Zhu, G Li, Y Ding, Y Xie
arXiv preprint arXiv:1810.00859, 2018
Rethinking the performance comparison between SNNS and ANNS
L Deng, Y Wu, X Hu, L Liang, Y Ding, G Li, G Zhao, P Li, Y Xie
Neural Networks 121, 294-307, 2020
Crossbar-aware neural network pruning
L Liang, L Deng, Y Zeng, X Hu, Y Ji, X Ma, G Li, Y Xie
IEEE Access 6, 58324-58337, 2018
Hygcn: A gcn accelerator with hybrid architecture
M Yan, L Deng, X Hu, L Liang, Y Feng, X Ye, Z Zhang, D Fan, Y Xie
2020 IEEE International Symposium on High Performance Computer Architecture …, 2020
Agents and methods for the prevention of initial onset of cancers, the treatment of cancers, and the recurrence of existing cancers
T Slaga, A Kumar, W Alworth
US Patent App. 10/069,604, 2004
Alleviating irregularity in graph analytics acceleration: a hardware/software co-design approach
M Yan, X Hu, S Li, A Basak, H Li, X Ma, I Akgun, Y Feng, P Gu, L Deng, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
Tianjic: A unified and scalable chip bridging spike-based and continuous neural computation
L Deng, G Wang, G Li, S Li, L Liang, M Zhu, Y Wu, Z Yang, Z Zou, J Pei, ...
IEEE Journal of Solid-State Circuits 55 (8), 2228-2246, 2020
Orchestrator: A low-cost solution to reduce voltage emergencies for multi-threaded applications
X Hu, G Yan, Y Hu, X Li
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 208-213, 2013
Medal: Scalable dimm based near data processing accelerator for dna seeding algorithm
W Huangfu, X Li, S Li, X Hu, P Gu, Y Xie
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
Thermal-sustainable power budgeting for dynamic threading
X Hu, Y Xu, J Ma, G Chen, Y Hu, Y Xie
2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2014
Persistence parallelism optimization: A holistic approach from memory bus to rdma network
X Hu, A Matheus
IEEE/ACM International Symposium on Microarchitecture, 2018
Semimap: A semi-folded convolution mapping for speed-overhead balance on crossbars
L Deng, L Liang, G Wang, L Chang, X Hu, X Ma, L Liu, J Pei, G Li, Y Xie
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Die stacking is happening
X Hu, D Stow, Y Xie
IEEE Micro 38 (1), 22-28, 2018
Programmable neural network trojan for pre-trained feature extractor
Y Ji, Z Liu, X Hu, P Wang, Y Zhang
arXiv preprint arXiv:1901.07766, 2019
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