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Ahmet Can Mert
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Design and implementation of encryption/decryption architectures for BFV homomorphic encryption scheme
AC Mert, E Öztürk, E Savaş
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (2), 353-362, 2019
922019
Design and implementation of a fast and scalable NTT-based polynomial multiplier architecture
AC Mert, E Öztürk, E Savaş
2019 22nd Euromicro Conference on Digital System Design (DSD), 253-260, 2019
592019
A hardware accelerator for polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
F Yaman, AC Mert, E Öztürk, E Savaş
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021
572021
An extensive study of flexible design methods for the number theoretic transform
AC Mert, E Karabulut, E Öztürk, E Savaş, A Aysu
IEEE Transactions on Computers 71 (11), 2829-2843, 2020
572020
Efficient number theoretic transform implementation on GPU for homomorphic encryption
Ö Özerk, C Elgezen, AC Mert, E Öztürk, E Savaş
The Journal of Supercomputing 78 (2), 2840-2872, 2022
552022
High performance 2D transform hardware for future video coding
AC Mert, E Kalali, I Hamzaoglu
IEEE Transactions on Consumer Electronics 63 (2), 117-125, 2017
532017
A computation and energy reduction technique for HEVC discrete cosine transform
E Kalali, AC Mert, I Hamzaoglu
IEEE Transactions on Consumer Electronics 62 (2), 166-174, 2016
512016
A flexible and scalable NTT hardware: Applications from homomorphically encrypted deep learning to post-quantum cryptography
AC Mert, E Karabulut, E Öztürk, E Savaş, M Becchi, A Aysu
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 346-351, 2020
452020
FPGA implementation of a run-time configurable NTT-based polynomial multiplication hardware
AC Mert, E Öztürk, E Savaş
Microprocessors and Microsystems 78, 103219, 2020
302020
KaLi : A Crystal for Post-Quantum Security Using Kyber and Dilithium
A Aikata, AC Mert, M Imran, S Pagliarini, SS Roy
IEEE Transactions on Circuits and Systems I: Regular Papers, 2022
262022
Medha: Microcoded hardware accelerator for computing on encrypted data
AC Mert, S Kwon, Y Shin, D Yoo, Y Lee, SS Roy
arXiv preprint arXiv:2210.05476, 2022
24*2022
A unified cryptoprocessor for lattice-based signature and key-exchange
AC Mert, D Jacquemin, A Das, D Matthews, S Ghosh, SS Roy
IEEE Transactions on Computers, 2022
212022
A low power versatile video coding (VVC) fractional interpolation hardware
A CanMert, E Kalali, I Hamzaoglu
2018 Conference on Design and Architectures for Signal and Image Processing …, 2018
212018
CoHA-NTT: A configurable hardware accelerator for NTT-based polynomial multiplication
K Derya, AC Mert, E Öztürk, E Savaş
Microprocessors and Microsystems 89, 104451, 2022
202022
A reconfigurable fractional interpolation hardware for VVC motion compensation
H Azgin, AC Mert, E Kalali, I Hamzaoglu
2018 21st Euromicro Conference on Digital System Design (DSD), 99-103, 2018
192018
An efficient FPGA implementation of HEVC intra prediction
H Azgin, AC Mert, E Kalali, I Hamzaoglu
2018 IEEE International Conference on Consumer Electronics (ICCE), 1-5, 2018
182018
An FPGA implementation of future video coding 2D transform
AC Mert, E Kalali, I Hamzaoglu
2017 IEEE 7th International Conference on Consumer Electronics-Berlin (ICCE …, 2017
162017
Low-latency asic algorithms of modular squaring of large integers for vdf evaluation
AC Mert, E Öztürk, E Savaş
IEEE Transactions on Computers 71 (1), 107-120, 2020
152020
Efficient multiple constant multiplication using DSP blocks in FPGA
AC Mert, H Azgin, E Kalali, I Hamzaoglu
2018 28th International Conference on Field Programmable Logic and …, 2018
122018
Reconfigurable intra prediction hardware for future video coding
H Azgin, AC Mert, E Kalali, I Hamzaoglu
IEEE Transactions on Consumer Electronics 63 (4), 419-425, 2017
122017
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