DongSoo Lee
DongSoo Lee
IBM T.J. Watson Research Center
Verified email at us.ibm.com
Title
Cited by
Cited by
Year
High-performance low-energy STT MRAM based on balanced write scheme
D Lee, SK Gupta, K Roy
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
512012
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE Symposium on VLSI Circuits, 35-36, 2018
362018
Soft-error-resilient FPGAs using built-in 2-D Hamming product code
SP Park, D Lee, K Roy
IEEE transactions on very large scale integration (VLSI) systems 20 (2), 248-256, 2011
362011
Column-selection-enabled 8T SRAM array with∼ 1R/1W multi-port operation for DVFS-enabled processors
SP Park, SY Kim, D Lee, JJ Kim, WP Griffin, K Roy
Low Power Electronics and Design (ISLPED) 2011 International Symposium on …, 2011
212011
Viterbi-based efficient test data compression
D Lee, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012
202012
Low-power log-MAP decoding based on reduced metric memory access
DS Lee, IC Park
IEEE Transactions on Circuits and Systems I: Regular Papers 53 (6), 1244-1253, 2006
192006
Energy-delay optimization of the STT MRAM write operation under process variations
D Lee, K Roy
IEEE Transactions on Nanotechnology 13 (4), 714-723, 2014
182014
R-MRAM: A ROM-Embedded STT MRAM Cache
D Lee, X Fong, K Roy
IEEE Electron Device Letters 34 (10), 1256-1258, 2013
182013
Area efficient ROM-embedded SRAM cache
D Lee, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (9 …, 2013
162013
Memory-based embedded digital ATE
D Lee, SP Park, A Goel, K Roy
29th VLSI Test Symposium, 266-271, 2011
112011
Viterbi-based Pruning for Sparse Matrix with Fixed and High Index Compression Ratio
D Lee, D Ahn, T Kim, PI Chuang, JJ Kim
102018
A low-complexity stopping criterion for iterative turbo decoding
DS Lee, IC Park
IEICE transactions on communications 88 (1), 399-401, 2005
92005
Embedding read-only memory in spin-transfer torque mram-based on-chip caches
X Fong, R Venkatesan, D Lee, A Raghunathan, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (3), 992 …, 2015
72015
A physics-based statistical model for reliability of STT-MRAM considering oxide variability
CH Ho, GD Panagopoulos, SY Kim, Y Kim, D Lee, K Roy
2013 International Conference on Simulation of Semiconductor Processes and …, 2013
52013
A physical model to predict STT-MRAM performance degradation induced by TDDB
CH Ho, GD Panagopoulos, SY Kim, Y Kim, D Lee, K Roy
71st Device Research Conference, 59-60, 2013
52013
Low-power log-MAP turbo decoding based on reduced metric memory access
DS Lee, IC Park
2005 IEEE International Symposium on Circuits and Systems, 3167-3170, 2005
52005
DeepTwist: Learning Model Compression via Occasional Weight Distortion
D Lee, P Kapoor, B Kim
arXiv preprint arXiv:1810.12823, 2018
42018
Retraining-Based Iterative Weight Quantization for Deep Neural Networks
D Lee, B Kim
arXiv preprint arXiv:1805.11233, 2018
42018
A Scalable Multi-TeraOPS Core for AI Training and Inference
S Shukla, B Fleischer, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
IEEE Solid-State Circuits Letters 1 (12), 217-220, 2018
32018
Double Viterbi: Weight Encoding for High Compression Ratio and Fast On-Chip Reconstruction for Deep Neural Network
D Ahn, D Lee, T Kim, JJ Kim
32018
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