Fabio Pareschi
Fabio Pareschi
Verified email at polito.it
Title
Cited by
Cited by
Year
Implementation and testing of high-speed CMOS true random number generators based on chaotic systems
F Pareschi, G Setti, R Rovatti
IEEE transactions on circuits and systems I: regular papers 57 (12), 3124-3137, 2010
1452010
Low-complexity multiclass encryption by compressed sensing
V Cambareri, M Mangia, F Pareschi, R Rovatti, G Setti
IEEE transactions on signal processing 63 (9), 2183-2195, 2015
1362015
On statistical tests for randomness included in the NIST SP800-22 test suite and based on the binomial distribution
F Pareschi, R Rovatti, G Setti
IEEE Transactions on Information Forensics and Security 7 (2), 491-505, 2012
952012
On the security of a class of diffusion mechanisms for image encryption
LY Zhang, Y Liu, F Pareschi, Y Zhang, KW Wong, R Rovatti, G Setti
IEEE transactions on cybernetics 48 (4), 1163-1175, 2017
912017
Hardware-algorithms co-design and implementation of an analog-to-information converter for biosignals based on compressed sensing
F Pareschi, P Albertini, G Frattini, M Mangia, R Rovatti, G Setti
IEEE transactions on biomedical circuits and systems 10 (1), 149-162, 2015
862015
A fast chaos-based true random number generator for cryptographic applications
F Pareschi, G Setti, R Rovatti
2006 Proceedings of the 32nd European Solid-State Circuits Conference, 130-133, 2006
812006
On known-plaintext attacks to a compressed sensing-based encryption: A quantitative analysis
V Cambareri, M Mangia, F Pareschi, R Rovatti, G Setti
IEEE Transactions on Information Forensics and Security 10 (10), 2182-2195, 2015
732015
EMI reduction via spread spectrum in DC/DC converters: state-of-the-art, optimization and trade-offs
F Pareschi, R Rovatti, G Setti
IEEE Access 3, 2857-2874, 2015
732015
A 3-GHz serial ATA spread-spectrum clock generator employing a chaotic PAM modulation
F Pareschi, G Setti, R Rovatti
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (10), 2577-2587, 2010
712010
A pragmatic look at some compressive sensing architectures with saturation and quantization
J Haboba, M Mangia, F Pareschi, R Rovatti, G Setti
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2 (3 …, 2012
532012
Practical optimization of EMI reduction in spread spectrum clock generators with application to switching DC/DC converters
F Pareschi, G Setti, R Rovatti, G Frattini
IEEE transactions on power electronics 29 (9), 4646-4657, 2013
502013
Second-level NIST randomness tests for improving test reliability
F Pareschi, R Rovatti, G Setti
2007 IEEE International Symposium on Circuits and Systems, 1437-1440, 2007
492007
Rakeness-based design of low-complexity compressed sensing
M Mangia, F Pareschi, V Cambareri, R Rovatti, G Setti
IEEE transactions on circuits and systems I: Regular Papers 64 (5), 1201-1213, 2017
402017
A case study in low-complexity ecg signal encoding: How compressing is compressed sensing?
V Cambareri, M Mangia, F Pareschi, R Rovatti, G Setti
IEEE Signal processing letters 22 (10), 1743-1747, 2015
332015
A two-class information concealing system based on compressed sensing
V Cambareri, J Haboba, F Pareschi, HR Rovatti, G Setti, K Wong
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1356-1359, 2013
332013
Complex oscillation-based test and its application to analog filters
S Callegari, F Pareschi, G Setti, M Soma
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (5), 956-969, 2010
332010
An analytical approach for the design of class-E resonant DC–DC converters
N Bertoni, G Frattini, RG Massolini, F Pareschi, R Rovatti, G Setti
IEEE Transactions on Power Electronics 31 (11), 7701-7713, 2016
312016
Low-cost security of IoT sensor nodes with rakeness-based compressed sensing: Statistical and known-plaintext attacks
M Mangia, F Pareschi, R Rovatti, G Setti
IEEE Transactions on Information Forensics and Security 13 (2), 327-340, 2017
272017
Short-term optimized spread spectrum clock generator for EMI reduction in switching DC/DC converters
F Pareschi, G Setti, R Rovatti, G Frattini
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (10), 3044-3053, 2014
272014
A rakeness-based design flow for analog-to-information conversion by compressive sensing
V Cambareri, M Mangia, F Pareschi, R Rovatti, G Setti
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1360-1363, 2013
262013
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