Nishil Talati
Nishil Talati
PhD Student, CSE, University of Michigan
Verified email at umich.edu - Homepage
Title
Cited by
Cited by
Year
Logic design within memristive memories using memristor-aided loGIC (MAGIC)
N Talati, S Gupta, P Mane, S Kvatinsky
IEEE Transactions on Nanotechnology 15 (4), 635-650, 2016
1672016
Memristive logic: A framework for evaluation and comparison
J Reuben, R Ben-Hur, N Wald, N Talati, AH Ali, PE Gaillardon, ...
2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017
392017
SIMPLE MAGIC: Synthesis and in-memory mapping of logic execution for memristor-aided logic
RB Hur, N Wald, N Talati, S Kvatinsky
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 225-232, 2017
362017
Practical challenges in delivering the promises of real processing-in-memory machines
N Talati, AH Ali, RB Hur, N Wald, R Ronen, PE Gaillardon, S Kvatinsky
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
142018
Stateful-NOR based reconfigurable architecture for logic implementation
P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha
Microelectronics Journal 46 (6), 551-562, 2015
72015
CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM
N Talati, H Ha, B Perach, R Ronen, S Kvatinsky
IEEE Micro 39 (1), 33-43, 2019
62019
A taxonomy and evaluation framework for memristive logic
J Reuben, N Talati, N Wald, R Ben-Hur, AH Ali, PE Gaillardon, ...
Handbook of Memristor Networks, 1065-1099, 2019
62019
Algorithmic considerations in memristive memory processing units (MPU)
RB Hur, N Talati, S Kvatinsky
CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and …, 2016
62016
mmpu—a real processing-in-memory architecture to combat the von neumann bottleneck
N Talati, R Ben-Hur, N Wald, A Haj-Ali, J Reuben, S Kvatinsky
Applications of Emerging Memory Technology, 191-213, 2020
52020
Implementation of NOR logic based on material implication on CMOL FPGA architecture
P Mane, N Talati, A Riswadkar, B Jasani, CK Ramesha
2015 28th International Conference on VLSI Design, 523-528, 2015
22015
CoPTA: Contiguous pattern speculating TLB architecture
Y Yang, H Ye, Y Chen, X Liu, N Talati, X He, T Mudge, R Dreslinski
International Conference on Embedded Computer Systems, 67-83, 2020
12020
Rate-compatible and high-throughput architecture designs for encoding LDPC codes
N Talati, Z Wang, S Kvatinsky
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
2017
Reconfiguration on nanocrossbar using material implication
P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha
Sādhanā 42 (1), 33-44, 2017
2017
Implicating logic functions with memristors
P Mane, N Talati, A Riswadkar, R Raghu, CK Ramesha
2014 International SoC Design Conference (ISOCC), 232-233, 2014
2014
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