| Going deeper with embedded fpga platform for convolutional neural network J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ... Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 938 | 2016 |
| Ese: Efficient speech recognition engine with sparse lstm on fpga S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 478 | 2017 |
| Accurate temperature-dependent integrated circuit leakage power estimation is easy Y Liu, RP Dick, L Shang, H Yang 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 289 | 2007 |
| Angel-eye: A complete design flow for mapping cnn onto embedded fpga K Guo, L Sui, J Qiu, J Yu, J Wang, S Yao, S Han, Y Wang, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 251 | 2017 |
| A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops Y Wang, Y Liu, S Li, D Zhang, B Zhao, MF Chiang, Y Yan, B Sai, H Yang 2012 Proceedings of the ESSCIRC (ESSCIRC), 149-152, 2012 | 214 | 2012 |
| FPMR: MapReduce framework on FPGA Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 210 | 2010 |
| Thermal vs energy optimization for dvfs-enabled processors in embedded systems Y Liu, H Yang, RP Dick, H Wang, L Shang 8th International Symposium on Quality Electronic Design (ISQED'07), 204-209, 2007 | 158 | 2007 |
| Technological exploration of RRAM crossbar array for matrix-vector multiplication L Xia, P Gu, B Li, T Tang, X Yin, W Huangfu, S Yu, Y Cao, Y Wang, ... Journal of Computer Science and Technology 31 (1), 3-19, 2016 | 148 | 2016 |
| Binary convolutional neural network on RRAM T Tang, L Xia, B Li, Y Wang, H Yang 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 782-787, 2017 | 133 | 2017 |
| Ambient energy harvesting nonvolatile processors: From circuit to system Y Liu, Z Li, H Li, Y Wang, X Li, K Ma, S Li, MF Chang, S John, Y Xie, J Shu, ... Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 118 | 2015 |
| Region ensemble network: Improving convolutional network for hand pose estimation H Guo, G Wang, X Chen, C Zhang, F Qiao, H Yang 2017 IEEE International Conference on Image Processing (ICIP), 4512-4516, 2017 | 117 | 2017 |
| Temperature-aware NBTI modeling and the impact of input vector control on performance degradation Y Wang, H Luo, K He, R Luo, H Yang, Y Xie 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 106 | 2007 |
| A survey of FPGA-based neural network accelerator K Guo, S Zeng, J Yu, Y Wang, H Yang arXiv preprint arXiv:1712.08934, 2017 | 103 | 2017 |
| Training itself: Mixed-signal training acceleration for memristor-based neural network B Li, Y Wang, Y Wang, Y Chen, H Yang 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 361-366, 2014 | 97 | 2014 |
| Memristor-based approximated computation B Li, Y Shan, M Hu, Y Wang, Y Chen, H Yang International Symposium on Low Power Electronics and Design (ISLPED), 242-247, 2013 | 94 | 2013 |
| On the efficacy of input vector control to mitigate NBTI effects and leakage power Y Wang, X Chen, W Wang, V Balakrishnan, Y Cao, Y Xie, H Yang 2009 10th International Symposium on Quality Electronic Design, 19-26, 2009 | 89 | 2009 |
| 4.7 a 65nm reram-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination … Y Liu, Z Wang, A Lee, F Su, CP Lo, Z Yuan, CC Lin, Q Wei, Y Wang, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 84-86, 2016 | 87 | 2016 |
| FPGP: Graph processing framework on FPGA a case study of breadth-first search G Dai, Y Chi, Y Wang, H Yang Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 86 | 2016 |
| MNSIM: Simulation platform for memristor-based neuromorphic computing system L Xia, B Li, T Tang, P Gu, PY Chen, S Yu, Y Cao, Y Wang, Y Xie, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 85 | 2017 |
| Time: A training-in-memory architecture for memristor-based deep neural networks M Cheng, L Xia, Z Zhu, Y Cai, Y Xie, Y Wang, H Yang 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2017 | 85 | 2017 |
Yu Wang(汪玉)Department of Electronic Engineering, Tsinghua University, ChinaVerified email at mail.tsinghua.edu.cn
