| Cascade2D: A design-aware partitioning approach to monolithic 3D IC with 2D commercial tools K Chang, S Sinha, B Cline, R Southerland, M Doherty, G Yeric, SK Lim Proceedings of the 35th International Conference on Computer-Aided Design, 1-8, 2016 | 38 | 2016 |
| Compact-2D: A physical design methodology to build commercial-quality face-to-face-bonded 3D ICs BW Ku, K Chang, SK Lim Proceedings of the 2018 International Symposium on Physical Design, 90-97, 2018 | 25 | 2018 |
| Power benefit study of monolithic 3D IC at the 7nm technology node K Chang, K Acharya, S Sinha, B Cline, G Yeric, SK Lim 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | 25 | 2015 |
| Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions K Chang, A Koneru, K Chakrabarty, SK Lim 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 805-810, 2017 | 22 | 2017 |
| Mapping control intensive kernels onto coarse-grained reconfigurable array architecture K Chang, K Choi 2008 International SoC Design Conference 1, I-362-I-365, 2008 | 21 | 2008 |
| Match-making for Monolithic 3D IC: Finding the right technology node K Chang, S Sinha, B Cline, G Yeric, SK Lim 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2016 | 14 | 2016 |
| Monolithic 3D IC design: Power, performance, and area impact at 7nm K Acharya, K Chang, BW Ku, S Panth, S Sinha, B Cline, G Yeric, SK Lim 2016 17th International Symposium on Quality Electronic Design (ISQED), 41-48, 2016 | 12 | 2016 |
| Memory-centric communication architecture for reconfigurable computing K Chang, K Choi International Symposium on Applied Reconfigurable Computing, 400-405, 2010 | 12 | 2010 |
| Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition K Chang, D Kadetotad, Y Cao, J Seo, SK Lim 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 10 | 2017 |
| Frequency and time domain analysis of power delivery network for monolithic 3D ICs K Chang, S Das, S Sinha, B Cline, G Yeric, SK Lim 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 8 | 2017 |
| Automatic mapping of control-intensive kernels onto coarse-grained reconfigurable array architecture with speculative execution G Lee, K Chang, K Choi 2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010 | 7 | 2010 |
| Full-chip monolithic 3D IC design and power performance analysis with ASAP7 library K Chang, BW Ku, S Sinha, SK Lim 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD …, 2017 | 6 | 2017 |
| Impact and design guideline of monolithic 3-D IC at the 7-nm technology node K Chang, K Acharya, S Sinha, B Cline, G Yeric, SK Lim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (7 …, 2017 | 6 | 2017 |
| RTL-to-GDS tool flow and design-for-test solutions for monolithic 3D ICs H Park, K Chang, BW Ku, J Kim, E Lee, D Kim, A Chaudhuri, S Banerjee, ... 2019 56th ACM/IEEE Design Automation Conference (DAC), 1-4, 2019 | 5 | 2019 |
| Memory-centered communication apparatus in a coarse grained reconfigurable array KY Choi, KW Chang, JK Paek US Patent 8,949,550, 2015 | 5 | 2015 |
| System-level power delivery network analysis and optimization for monolithic 3-D ICs K Chang, S Das, S Sinha, B Cline, G Yeric, SK Lim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 888-898, 2019 | 4 | 2019 |
| VLSI placement parameter optimization using deep reinforcement learning A Agnesina, K Chang, SK Lim Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 3 | 2020 |
| Power, performance, and area benefit of monolithic 3D ICs for on-chip deep neural networks targeting speech recognition K Chang, D Kadetotad, Y Cao, JS Seo, SK Lim ACM Journal on Emerging Technologies in Computing Systems (JETC) 14 (4), 1-19, 2018 | 3 | 2018 |
| Road to high-performance 3d ics: Performance optimization methodologies for monolithic 3d ics K Chang, S Pentapati, DE Shim, SK Lim Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 3 | 2018 |
| Coarse-grained reconfigurable architecture for multiple application domains: a case study M Jo, G Lee, K Chang, K Han, K Choi, H Yang, K Yoon Proceedings of the 2009 International Conference on Hybrid Information …, 2009 | 3 | 2009 |
Sung Kyu LimProfessor, Georgia Institute of Technologyece.gatech.edu üzerinde doğrulanmış e-posta adresine sahip
